Kamil Kopryk
a4ebfa6630
fix: add missing completion stamp update
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Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-06-26 15:38:46 +02:00
Neil R. Spruit
532c663da6
feature: Add Initial Support for Get Vector Width Properties
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- Added support for L0 to query Vector Width Properties which allows for
querying all the supported vector widths and their prefferred and
native vector widths per data type.
- Updated shared code to support querying the same values thru
getPreferredVectorWidth* and getNativeVectorWidth* helper functions
for OpenCL and Level Zero.
- Initial support for reporting base values for the vector
widths with future support for reporting different values per platform and
based on the SIMD/SIMT size used.
Related-To: NEO-13745
Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com >
2025-06-25 01:11:30 +02:00
Szymon Morek
0db5ce22a1
performance: use resource_barrier on Xe2 and PTL
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-06-24 14:24:47 +02:00
Kamil Kopryk
f0f89836e0
fix: l3 flush after post sync logic in OCL
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Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-06-23 18:03:21 +02:00
John Falkowski
764fd33a46
refactor: clSetKernelArgSVMPtr ptr error if debug var set
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Related-To: NEO-12988
Signed-off-by: John Falkowski <john.falkowski@intel.com >
2025-06-18 20:55:48 +02:00
Mateusz Jablonski
0c066b4266
refactor: remove C-style casts 1/n
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Related-To: NEO-15174
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-06-17 17:50:56 +02:00
Compute-Runtime-Validation
890182b093
Revert "fix: skip cleanup in DllMain when terminating process"
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This reverts commit 0b5c9125ac .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-06-17 04:34:30 +02:00
Oskar Hubert Weber
0b5c9125ac
fix: skip cleanup in DllMain when terminating process
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Per https://learn.microsoft.com/en-us/windows/win32/dlls/dllmain ,
it's not safe to cleanup resources in DllMain when
fdwReason == DLL_PROCESS_DETACH and lpvReserved != NULL (the process is
terminating), e.g. can result in a hang in some cases.
Related-To: NEO-14121
Signed-off-by: Oskar Hubert Weber <oskar.hubert.weber@intel.com >
2025-06-16 11:08:43 +02:00
Szymon Morek
ac7d936942
fix: invalidate texture cache for BCS image write
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Related-To: NEO-15029
If BCS is writing new data to an image, texture cache
should be invalidated as it might contain stale data for
that image.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-06-13 13:28:08 +02:00
Damian Tomczak
5cd1423bab
feature: packed surface format
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Resolves: NEO-13669
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com >
2025-06-12 17:32:16 +02:00
Mateusz Jablonski
0a325e09be
fix: correct initialization of Kernel::isBuiltIn
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value is used in Kernel::initialize but was set after initialize call
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-06-11 18:29:06 +02:00
Kamil Kopryk
bb52c358b9
refactor: flush Task method
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
Related-To: NEO-15011
Also correct ults
2025-06-11 16:36:56 +02:00
Compute-Runtime-Validation
9be9ec22ac
Revert "fix: setup printf surface when implicit args are programmed"
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This reverts commit ca3079f263 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-06-11 14:09:56 +02:00
Szymon Morek
26a83c9f2c
refactor: remove redundant specializations
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Related-To: NEO-15029
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-06-09 19:30:30 +02:00
Mateusz Hoppe
f1f3ee13db
refactor: set argsExtended in EncodeWalkerArgs
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Related-To: NEO-14209
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-06-03 11:45:39 +02:00
Chodor, Jaroslaw
46c60290b9
refactor: introducing igfxfmid_wrapper
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Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com >
2025-05-30 19:26:04 +02:00
Mateusz Jablonski
ca3079f263
fix: setup printf surface when implicit args are programmed
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even if main kernel is not using printf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-05-30 19:01:12 +02:00
Compute-Runtime-Validation
1a50e8e7c0
Revert "performance: use RESOURCE_BARRIER as stalling barrier"
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This reverts commit 556c0b64c6 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-30 18:00:34 +02:00
Katarzyna Cencelewska
828d6bafa7
fix: return proper value for zeKernelSuggestGroupSize
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Resolves: HSD-18042274687
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-30 16:35:21 +02:00
Compute-Runtime-Validation
a188c29e8c
Revert "fix: setup printf surface when implicit args are programmed"
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This reverts commit e3be9eaea7 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-30 15:24:29 +02:00
Grochowski, Stanislaw
2d9108f8b6
refactor: change DefaultComputeWalker
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Related-To: NEO-14537
Signed-off-by: Grochowski, Stanislaw <stanislaw.grochowski@intel.com >
2025-05-29 18:05:29 +02:00
Mateusz Jablonski
88820a414f
fix: include all devices when creating OCL context from type
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Related-To: NEO-15086, GSD-11201
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-05-29 17:04:53 +02:00
Katarzyna Cencelewska
e357e7e404
fix: correct limitation for num threads per thread group
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taking into account the max work group limit
when simd1 don't use the same limitation as for simd32
Resolves: NEO-14922
Related-To: NEO-11881
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-29 16:34:40 +02:00
Mateusz Jablonski
e3be9eaea7
fix: setup printf surface when implicit args are programmed
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even if main kernel is not using printf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-05-29 11:49:54 +02:00
Szymon Morek
556c0b64c6
performance: use RESOURCE_BARRIER as stalling barrier
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-28 12:30:01 +02:00
Maciej Plewka
e6f3ebce5d
fix: add pc with stall before barrier with post sync on bmg
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Related-To: NEO-14491
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-28 09:24:21 +02:00
Kamil Kopryk
b7681a2e7b
refactor: redirect flush L3 host usm to external by default
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Related-To: NEO-13163
Rename ForceL3FlushAfterPostSync to EnableL3FlushAfterPostSync
Rename DisableFlushL3ForHostUsm to RedirectFlushL3HostUsmToExternal
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-05-28 08:50:01 +02:00
Lukasz Jobczyk
86e7d5b276
performance: Skip fence after PC when no post sync write
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-23 10:33:28 +02:00
Mateusz Hoppe
0d57dcfdf0
feature: add L0 API querying priority levels - zeDeviceGetPriorityLevels()
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Related-To: NEO-14572
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-05-23 09:24:16 +02:00
Compute-Runtime-Validation
593c9e76f2
Revert "fix: correct limitation for num threads per thread group"
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This reverts commit 6ad4ad41b1 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-23 02:51:17 +02:00
Chodor, Jaroslaw
a97563bf48
feature: Adding mechanism for overriding exposed device IP version
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Related-To: GSD-10248
Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com >
2025-05-22 11:59:26 +02:00
Kamil Kopryk
caf1781e73
fix: add L3 flush after post sync for zero copy mem objects
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Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-05-22 10:23:26 +02:00
Katarzyna Cencelewska
6ad4ad41b1
fix: correct limitation for num threads per thread group
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taking into account the max work group limit
Resolves: NEO-14922
Related-To: NEO-11881
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-22 00:06:21 +02:00
Vysochyn, Illia
f99a4c2193
feature: Define thread group dispatch size according to kernel metadata
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Related-To: NEO-10945
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com >
2025-05-19 16:02:21 +02:00
Mateusz Hoppe
b03f625f03
feature: limit max LWS based on preferred number of workgroups per ss
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- limit max LWS size when SLM and barriers are not used
Related-To: GSD-11112
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-05-16 20:28:00 +02:00
Compute-Runtime-Validation
8839d62c79
Revert "performance: use RESOURCE_BARRIER as stalling barrier"
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This reverts commit 2a63853349 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-16 20:19:06 +02:00
Szymon Morek
2a63853349
performance: use RESOURCE_BARRIER as stalling barrier
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-16 14:12:18 +02:00
Szymon Morek
bff8f74de7
refactor: remove unused parameter
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-15 12:23:27 +02:00
Maciej Plewka
85ed1a15e4
fix: do not allow blit for depth image on arl
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Related-To: NEO-14344
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-13 15:56:47 +02:00
Compute-Runtime-Validation
7d9399e836
Revert "fix: Abort for blit usage on depth image on ARL"
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This reverts commit a19fa245ab .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-10 03:17:50 +02:00
Maciej Plewka
a19fa245ab
fix: Abort for blit usage on depth image on ARL
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Related-To: NEO-14344
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-09 15:08:39 +02:00
Lukasz Jobczyk
df2c776aab
refactor: Remove unused cmdq round robin engine assign
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 11:03:57 +02:00
Lukasz Jobczyk
1d1414febc
refactor: remove unused dc flush mitigation
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 08:26:26 +02:00
Lukasz Jobczyk
d590172b65
refactor: Remove unused events tracker
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-08 23:53:47 +02:00
Michal Mrozek
6f4a397cfc
refactor: remove not required parameter
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-08 23:13:06 +02:00
Michal Mrozek
52daf63a6f
refactor: remove not needed debug variable
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-08 14:29:27 +02:00
Lukasz Jobczyk
62619f9525
refactor: remove unused kernel tunning
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-08 14:18:21 +02:00
Filip Hazubski
ba85f7417d
fix: Add debug toggle to disable flush L3 for host usm
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2025-05-07 16:57:31 +02:00
Michal Mrozek
8d1e83208b
refactor: remove redundant code
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 16:41:21 +02:00
Michal Mrozek
afdc04975f
refactor: remove ftrSvm variable
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- it is true on all platforms.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 16:16:42 +02:00