Commit Graph

182 Commits

Author SHA1 Message Date
Dunajski, Bartosz
feff1c35cc feature: Experimental support of immediate cmd list in-order execution [5/n]
Related-To: LOCI-4332

- Signal non-timestamp Walkers with in-order CL value
- Event host synchronization based on CL signal value

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-09 11:46:14 +02:00
Dunajski, Bartosz
c1f71ea7f7 feature: new conditional bb_start mode + aub tests
Related-To: LOCI-4332

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-05 14:40:17 +02:00
Dominik Dabek
c84c7a0c91 performance: adjust thread group dispatch size
adjust thread group dispatch size on pvc if chosen size does not evenly
divide dimension

this is to avoid leftover thread groups

Related-To: NEO-7927

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-04-27 18:24:53 +02:00
Zbigniew Zdanowicz
4c7bc2ca98 [feature, perf] add alogrithm to chain command buffers in container
This feature is part of performance improvement to dispatch and start
command buffers as primary batch buffers.
When exhausted command buffer is closed, then reserve exact space for chained
batch buffer start and bind it to the next command buffer.
When closing command buffer, then save ending pointer and
reserve aligned space.

Related-To: NEO-7807

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-05 15:49:01 +02:00
Dunajski, Bartosz
3ff7a63145 Reduce number of jumps in RelaxedOrdering scheduler
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-04-04 09:07:59 +02:00
Zbigniew Zdanowicz
bc4e540c33 [fix] unify heaps size programing
- share same code between csr and cmd container to get default heap size
- share handling of debug flag to change heap size
- share platform level surface heap size between csr and command list
- refactor heap size files
- put heap size constant and function into namespace
- command list surface heap size increased to 2MB for xehp+ to match csr
- command list increased surface heap size only for sba tracking
- sba tracking heap consumption increased due to different reset policy

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-17 08:34:06 +01:00
Cencelewska, Katarzyna
398c7b2d29 refactor, remove typo in struct name
change name of EncodeSempahore to EncodeSemaphore
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-10 15:44:25 +01:00
Cencelewska, Katarzyna
c274309d7b wa: add dummy blits before command MI_FLUSH_DW
to guarantee that all subblt got complete for previous copy
affect xe hpg

temporary changes under flag ForceDummyBlitWa

Related-To: NEO-7450

Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-09 10:40:35 +01:00
Cencelewska, Katarzyna
3e116ea378 refactor: use same paths when add command mi_semaphore_wait
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-07 10:35:26 +01:00
Cencelewska, Katarzyna
50da32ffb1 wa: add dummy blits before command MI_ARB_CHECK
to guarantee that all subblt got complete for previous copy
affect xe hpg

Related-To: NEO-7450

Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-07 10:21:05 +01:00
Zbigniew Zdanowicz
34064811d2 Refactor state base address programing 4/n
- This change gets level one cache policy from cached values instead
of calling virtual methods

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-27 17:30:36 +01:00
Zbigniew Zdanowicz
3cb064fe95 Refactor state base address programing 3/n
This is small optimization to replace virtual call and retrieved struct with
cached value.

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-23 13:08:32 +01:00
Zbigniew Zdanowicz
43a49c4486 Refactor state base address programing 2/n
This change allows to read sba data directly from sba properties

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-23 12:20:25 +01:00
Zbigniew Zdanowicz
bf2072c3ea Add cross regular and intermediate command lists base address state transitions
- updates coming from regular list are updated in csr last sent variables
- all per context and per kernel transitions kept in single place
- state updates from intermediate to regular are set in csr properties
- global atomics support duplicates removed

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-17 16:49:47 +01:00
Zbigniew Zdanowicz
7e0401d280 Add improvements to heap estimation in level zero command lists
- add estimation parameter for interface descriptor data count
- add to the heap estimation alignment parameter for dynamic and surface heaps
- extend encode interface and implementations to allow child heaps

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-03 20:26:27 +01:00
Zbigniew Zdanowicz
5097ef4825 Change dispatch kernel interface to provide already prepared heap objects
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-02 14:08:43 +01:00
Rafal Maziejuk
9080b0c109 Delete redundant adjustNumberOfThreadsInThreadGroup method
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-01-30 17:10:01 +01:00
Kamil Kopryk
004d3e3416 refactor: don't use global ProductHelper getter 18
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-30 08:15:39 +01:00
Kamil Kopryk
026d50c7b9 refactor: don't use global ProductHelper getter 13/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-27 13:52:36 +01:00
Rafal Maziejuk
b7380237c2 Add adjustNumberOfThreadsInThreadGroup method to EncodeDispatchKernel
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-01-26 15:25:01 +01:00
Kamil Kopryk
27393c76ea refactor: don't use global ProductHelper getter 11/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-26 08:16:52 +01:00
Warchulski, Jaroslaw
e21cf516d3 Cleanup includes 44
Cleaned up files:
level_zero/tools/source/sysman/windows/os_sysman_imp.h
opencl/source/command_queue/command_queue.h
shared/source/command_container/cmdcontainer.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-25 16:05:22 +01:00
Kamil Kopryk
1758f55fe3 refactor: don't use global ProductHelper getter 7/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-23 16:37:47 +01:00
Warchulski, Jaroslaw
49837b7bb5 Cleanup includes 39
Cleaned up files:
shared/source/command_container/command_encoder.h

Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-23 11:56:42 +01:00
Kamil Kopryk
f2bbb56d29 refactor: don't use global GfxCoreHelper getter 2/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-10 13:07:03 +01:00
Kamil Kopryk
f654481def refactor: don't use global ProductHelper getter
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-09 12:56:51 +01:00
Warchulski, Jaroslaw
9f3fc6858e Cleanup includes 16
Cleaned up files:
shared/source/built_ins/built_ins.h
shared/source/command_container/command_encoder.h
shared/source/helpers/hw_helper.h
shared/source/memory_manager/allocation_properties.h
shared/source/xe_hpc_core/hw_cmds.h
shared/test/common/test_macros/test_excludes.h

Related-To: NEO-5548

Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-29 15:12:37 +01:00
Dunajski, Bartosz
bcecd069b4 Add additional kernel flag + capability to pull extra patch tokens
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-13 09:04:39 +01:00
Tratnack, Geoffrey
d2c218efe3 Add a patch to command encoder for samplers when DSH is dirty.
Signed-off-by: Tratnack, Geoffrey geoffrey.tratnack@intel.com
Related-To: LOCI-3365
2022-12-09 11:08:23 +01:00
Tratnack, Geoffrey
818db03a68 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-12-08 17:07:53 +01:00
Yates, Brandon
4bd5765a06 L0 Debug - Fix imm cmdlist mode on windows
Single Address Space SBA programming was using incorrect BB
level and not loading GPR15

Related-to: NEO-7517
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-11-25 20:37:14 +01:00
Kamil Kopryk
4aa1697e3c Move hwInfoConfig ownership to RootDeviceEnvironment 2/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Use RootDeviceEnvironment getHelper<ProductHelper> for
- adjustSamplerState
- adjustPlatformForProductFamily.
2022-11-14 13:04:31 +01:00
Compute-Runtime-Validation
77b6918f30 Revert "LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command enco...
This reverts commit cb3f7234f0.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-11-12 16:05:11 +01:00
Tratnack, Geoffrey
cb3f7234f0 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-10 23:28:58 +01:00
Dunajski, Bartosz
002184586c Add command buffer helpers: Conditional BB_START and GPR Inc/Dec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-10 18:56:24 +01:00
Dunajski, Bartosz
918d7b1da4 Helper for MI_SET_PREDICATE programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-08 14:20:01 +01:00
Compute-Runtime-Validation
ddbaa5e8c9 Revert "Cleanup MediaInterfaceDescriptorLoad logic in command encoder"
This reverts commit 349af0bd5e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-11-07 02:20:27 +01:00
Tratnack, Geoffrey
349af0bd5e Cleanup MediaInterfaceDescriptorLoad logic in command encoder
Add a patch to command encoder for samplers when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-06 03:27:23 +01:00
Dominik Dabek
6cf8b4daca Correct tg dispatch size heuristic
Multiply available thread count by tile count
if implicit scaling is used

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-10-27 17:24:53 +02:00
Zbigniew Zdanowicz
87822f94e2 Replace virtual method call for DC flush with stored bool value 2/n
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-12 09:43:01 +02:00
Tratnack, Geoffrey
1b9c510614 Update to command_encoder, fix bug changing dynamic state memory
Adding ULT for encode and command container changes
Refactor getHeapSpaceAllowGrow and getHeapWithRequiredSizeAndAlignment

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-10-11 03:40:25 +02:00
Zbigniew Zdanowicz
3d92186362 Add heap sharing to immediate command lists
This change is intended to be used in immediate command lists that are
using flush task functionality.
With this change all immediate command list using the same csr will consume
shared allocations for dsh and ssh heaps. This will decrease number of SBA
commands dispatched when multiple command lists coexists and dispatch kernels.
With this change new SBA command should be dispatched only when current heap
allocation is exhausted.
Functionality is currently disabled and available under debug key.
Functionality will be enabled by default for all immediate command lists
with flush task functionality enabled.

Related-To: NEO-7142

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-03 18:50:10 +02:00
Maciej Bielski
0d0d6a300e Debugger: simplify captureStateBaseAddress()
So far captureStateBaseAddress() was a wrapper around
programSbaTrackingCommands(), doing an additional checking before
calling the latter. The checking is apparently no longer relevant, so
unify the distinction and remove part of the code which is no longer
needed.

In practice, keep the captureStateBaseAddress() while moving the body of
programSbaTrackingCommands() into it. This imposes lower diff-impact
onto the class hierarchy. Remove the second function. Simplify the
caller which had to distinct these two functions previously.

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-13 17:08:31 +02:00
Kamil Kopryk
410fd7d909 Correct binding table prefetch
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075

Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
2022-09-13 14:34:30 +02:00
Maciej Bielski
e1b80ba1a8 Cleanup: updateStreamProperties(), SBA tracking
Fixes found out while working on the StateBaseAddress adaptation to
StreamProperties. Removing unused parameters, improving code reuse
(further improvements come with following commits).

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-12 17:56:28 +02:00
Naklicki, Mateusz
f7332fc30b Change order of EncodeDispatchKernelArgs members
Order members by their size

Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
2022-09-06 16:49:48 +02:00
Zbigniew Zdanowicz
a4b9b3b837 Extend encode class for start and end hw commands
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-02 16:29:36 +02:00
Dominik Dabek
8cc0177f1c Change DG2 l1 cache policy to WB
With compiler LSC WAs this gives better performance.

If debugger is active, policy will not be changed ie.
will be WBP.

Related-To: NEO-7003

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
Compute-Runtime-Validation
2621460e80 Revert "Change DG2 l1 cache policy to WB"
This reverts commit a820e73dd7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-27 08:04:19 +02:00
Naklicki, Mateusz
54042a191e Implement PauseOnEnqueue for L0
Allow pausing execution before and after enqueuing kernel
using the PauseOnEnqueue and PauseOnGpuMode debug flags.

Related-To: NEO-6570
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
2022-08-26 14:48:58 +02:00