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cd5f85052e9f575fba6811f288e8ea353708088f
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76 Commits

Author SHA1 Message Date
Milczarek, Slawomir
cd5f85052e AUB CSR with a separate function to submit batch buffer 
Move code related to batch buffer submission from flush to dedicated function
Add parameter to pass aub file name from AubCenter to AubManager

Change-Id: I20abb3c8bd92114b3bc9caa2a6291dc1bbddad2a
 2018-11-25 18:02:25 -08:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Dunajski, Bartosz
ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Mateusz Jablonski
0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Milczarek, Slawomir
1a4628cd8e AUB file with information about driver version 
Change-Id: I7f8e01236962580515f36d72805d33af40d5fd2d
 2018-11-14 19:46:45 +01:00
Hoppe, Mateusz
0942edd6af Update aub_stream headers 
- pass hwInfo and localMemoryEnabled to AubCenter ctor
- initialize AubCenter in Platform:intialize() when Device is
 created - only when CSR is not CsrHw
- move aub_center files to runtime/aub directory

Change-Id: Iceb4bf1cb2bb55b42d438502cca667a449f11411
 2018-11-13 18:09:30 +01:00
Milczarek, Slawomir
aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Zdanowicz, Zbigniew
ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Mrozek, Michal
7ece16ee7a Graphics Allocation cleanup. 
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
 2018-10-31 11:54:24 +01:00
Milczarek, Slawomir
4a8f4aa47b Add hash function for AUB dump handle 
Change-Id: I3f53f187a31ca47e7cf2717f328c216469171f90
 2018-10-30 19:54:36 -07:00
Milczarek, Slawomir
b051528258 Add getter for handle to AUB dump allocations 
Change-Id: I30251145775e9d81e307c983236bd2cc0568a74d
 2018-10-30 12:06:17 -07:00
Mrozek, Michal
56d10d7fb9 Enhance AUB comments. 
Change-Id: I1ff53c9f60950cfe34706153578e86f8d36fc941
 2018-10-25 17:58:44 +02:00
Milczarek, Slawomir
cd8f08b94b AUB CSR functions to operate on engine instance 
Change-Id: I928cf5f7c25980fdfb2da825cbe062b5497c328a
 2018-10-24 16:33:11 -07:00
Milczarek, Slawomir
9be4850213 AUB capture with a capability to get engine instance 
Change-Id: I52c47505476053d6e692fc9d89cca25a6e122a63
 2018-10-23 11:58:13 +02:00
Piotr Fusik
7543c1fb2a Flush AUB before HW or TBX. 
Change-Id: Ia997c6c05b2a1cb5c1968113b94ca66fbf1efe89
 2018-10-13 10:52:19 +02:00
Pawel Wilma
a05f832f80 Fix for batch buffer flattening 
Change-Id: Ib13ec6573b985cf03876bd7e37a31606b230a790
 2018-10-09 12:28:40 +02:00
Maciej Dziuban
130a7ac8b8 Delete TypeSelector helper 
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-08 13:18:36 +02:00
Hoppe, Mateusz
2f7158e035 Move createPhysicalAllocator() to a common CSR class 
- AUB and TBX use this method and it was duplicated,
- moving to common base class allows to remove duplicates

Change-Id: Ia9f08dfb0967de1b5968ac0e531733c5b868e504
 2018-10-08 11:38:57 +02:00
Milczarek, Slawomir
61000c0dd4 CSR AUB + HW mode - flush to poll MMIO for completion 
Ensures that each submit of LRCA be serialized through the simulator
like it is for AUBs captured in the standalone mode.

Change-Id: I1e3ad500012dce960d0e64b56af1cb60142772da
 2018-10-04 10:32:08 +02:00
Milczarek, Slawomir
ec48ccecdb AUB CSRs to use a shared address mapper (CPU VA to GTT VA) 
This commit moves address mapper from CSR to execution environment
in order to generate unique GTT VA for LRCA, HWSP and ring buffer
between different CSRs.
Additionally, moved the rest of AUB file stream tests to separate module.

Change-Id: I02ae44202c0255277a7ac17532485419e0c403ab
 2018-10-03 12:50:25 +02:00
Hoppe, Mateusz
7ddf1d554b Move getAddressSpace from AUB & TBX CSRs to CSRSimulatedHw 
Change-Id: Iaa6164445f55efba3681fc41e2ec614f999e1362
 2018-09-27 10:43:00 -07:00
Hoppe, Mateusz
465e1a3165 Fixes for AUBs 
Change-Id: Iac55927eb96db8dd68b86d21e66392039ba1f058
 2018-09-27 06:38:19 +02:00
Milczarek, Slawomir
efdbde245a AUB CSRs to use a shared physical address allocator 
This commit introduces AUB-specific control class to execution environment.

Change-Id: I525c9c93a4f10f769dbedb7d097674c35693f0b1
 2018-09-26 20:31:56 +02:00
Maciej Dziuban
95e4dc4152 Delete unneeded residency/eviction allocations mutators 
Change-Id: Ic73ea4c4e3ebf422f935a440a1b4789fe1c15494
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-26 13:02:19 +02:00
Mrozek, Michal
4912f41759 Add additional layer for common AUB & TBX stuff. 
- Move one function there.
- This layer will cover common functions that are not branch specific.

Change-Id: Ia8a288f8f51647a333a73f35cf999df9f2d5f5b1
 2018-09-26 02:20:59 +02:00
Mrozek, Michal
f564792895 Create common class for TBX & AUB. 
- Move one method there.

Change-Id: I96cc0a64e24e4931a8d71a552f5cbf22bf99bfc2
 2018-09-26 01:24:59 +02:00
Hoppe, Mateusz
dfd4e767e0 Introducing AubFixture with minimum required initialization 
- fixture is creating AUBCsr or TBXWithAubCsr only and sets
executionEnvironment used by Device
- this sequence ensures correct initialization without redundant
objects creation
- adding new AUB test: AubWriteCopyReadBufferTest

Change-Id: I678410585c91c008fc53a44b13e885e970fd315b
 2018-09-25 23:03:21 +02:00
Maciej Dziuban
f48b90ffee Change CommandStreamReceiver::flush() argument to a reference 
Change-Id: Ic933a297d4c4e243138d0d62323ba82a8b91240f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-25 17:28:44 +02:00
Milczarek, Slawomir
ee797c2f14 Multiple AUB CSRs to operate on a single file stream 
This commit introduces AUB stream provider class to produce
a single file stream in multi device scenarios with multiple AUB CSRs.

Change-Id: Id70e0d680459d34f4291b9e56aa39d960f025ac6
 2018-09-23 05:41:00 +02:00
Hoppe, Mateusz
91aaa92fb6 Refactor PhysicalAddressAllocator 
- create allocator dynamically in AUB & TBX CSRs

Change-Id: I3b01a3fc2f4824b552ef27cbda5bdcc140e92e53
 2018-09-21 21:48:57 +02:00
Hoppe, Mateusz
a470aa2072 Get AddressSpace to expectMemory from page table entry bits 
Change-Id: I1aacdf98f436261b523765e0ca591e8d8333274e
 2018-09-21 16:44:55 +02:00
Piotr Fusik
7de297763f Fix duplicate include. 
Change-Id: Iaecbf3664bd09006070b31e1e7490d297dcd3de1
 2018-09-21 05:20:15 +02:00
Mrozek, Michal
78f828fcd1 Make residency in graphics allocation OsContext dependent. 
- Graphics Allocation now holds residency control per OsContext.

Change-Id: Ie0a0d3aa9fdaf542fdd42dee3aba236a5af635c7
 2018-09-20 16:44:04 +02:00
Hoppe, Mateusz
4af432ae10 Store page entry bits in PageTable entries 
- set Present bit when entry is allocated regardless entry bits passed.

Change-Id: Ib1393927f66c4ed0b577a4df58d2760fbff86df7
 2018-09-20 09:25:34 +02:00
Hoppe, Mateusz
619d2217cb Pass AubHelper to reserveAddressPPGTT(). 
- get PageTable entry data hints and address space from AubHelper
based on local memory flag
- add enableLocalMemory flag in CSR HW

Change-Id: I061bda62be8da55d52cff48ecddcf26c4212dc67
 2018-09-17 18:48:06 +02:00
Maciej Dziuban
ac1d2b9901 Change processResidency argument to a reference 
Change-Id: Ie313a8cc4e479a314bcf170917397c13fbb70d14
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 13:36:20 +02:00
Hoppe, Mateusz
610eda5ad1 Add PhysicalAddressAllocator to PageTables 
- Allocator is responsible for physical pages allocation

Change-Id: I3a9034c87292484da8f4f0eb1d1e0cc5122a4d8a
 2018-09-14 13:23:07 +02:00
Maciej Dziuban
da5a292e54 Delegate MemoryManager residency and eviction calls through CSR 
MemoryManager::getEvictonAllocations()
MemoryManager::pushAllocationForEviction()
MemoryManager::clearEvictionAllocations()
MemoryManager::clearResidencyAllocations()

Change-Id: Iaa3051965bc9dfc09384e2bd5e9e0c372b5e722a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-14 08:18:04 +02:00
Milczarek, Slawomir
a7d41d95b4 AUB subcapture in filter mode to define start/end indexes to a given kernel 
This commit introduces new controls to define start/end indexes
that apply only to the kernel specified by name for a sub-capture

Change-Id: I7ad7674d115f9addd35c44d824aee0731060881e
 2018-09-13 11:13:33 +02:00
Maciej Dziuban
d24a0accd9 Get rid of processResidency() calls with null ResidencyContainer 1/n 
Change-Id: Ifeed7d1154ed07988ee2196a95013eae4d5a80d0
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-09-11 15:32:11 +02:00
Milczarek, Slawomir
991bbddeba Add function to get Page Table entry bits 
This commit adds a helper function to get Page Table entry bits
and control a configuration of first levels page walks (non-PTE).

Change-Id: I85666ffae8e89a193d1ac4a065c2b84b814d47ec
 2018-09-11 14:10:42 +02:00
Hoppe, Mateusz
2315403542 Refactor AUB & TBX CSRs 
- add method for getting addressSpace

Change-Id: I12d466e358db1d21c038bd9e0201cae433a5ec1a
 2018-09-10 09:42:35 +02:00
Milczarek, Slawomir
254f4a91ac AUB CSR to use size from gmm when calling makeResident on RenderCompressed 
This commit adds a capability to dump AUB files for RenderCompressed
in AUB CSR + HW mode.

Change-Id: Id43409f4ee986da2b3c347e5f6f07bb566249633
 2018-09-04 14:15:03 +02:00
Milczarek, Slawomir
b2beed3daa AUB CSR to call make resident of the base CSR 
This commit ensures that AUB CSR be using make resident of the base CSR class
hence the task count of the graphics allocation be updated properly.

Change-Id: I33b5ed86a463eeeee00a4094cefda8add316af73
 2018-09-03 16:43:10 +02:00
Pawel Wilma
4a12deea2b Add support for reduced GPU address space 
Change-Id: I9ebbc8c51039bb533b44c6b80e717e1489a20a43
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-09-03 13:51:36 +02:00
Mateusz Jablonski
92bfd2e3d2 Move OsContext to Device 
Change-Id: I030b65372fbdc075423d22720e9da34ac65b8e68
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-09-03 10:42:26 +02:00
Milczarek, Slawomir
393c2219c9 Add device callback for GMM library to notify AUB subcapture 
This commit adds a new callback to be called by GMM library
when it allocates/deallocates compressed resources to collect data
about their addresses and sizes and handle their AUB residency.

Change-Id: I075d3ff4cb049cfe626da82892069c4460ea585c
 2018-08-20 14:38:42 +02:00
Slawomir Milczarek
55475c2848 Clang tidy: Call to virtual function during destruction 
Fix for clang tidy warning: Call to virtual function
during destruction will not dispatch to derived class

Change-Id: I000dacdbdfb486d2e35795d18ea9f5e4a00b7d6a
 2018-08-09 15:20:58 +02:00
Mrozek, Michal
1599ea800e Pass execution environment to command stream receiver. 
Change-Id: I598f67f8b005b5ce8249b638e080657eb6dc3547
 2018-08-08 17:10:39 +02:00