Make sure local mem alloc size atomic array is initialized with 0.
Add debug breaks to catch possible overflow on unregistering
allocations.
Related-To: NEO-11356
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
Track memory used by memory allocations. System and local per device.
Will be used for heuristics in memory pooling.
Related-To: NEO-11356
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
computeMaxNeededSubSliceSpace is no longer needed as getHighestEnabledSubSlice
already determines maximum index from all enabled subslices
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
avoid redefinition issue in case of integrating multiple xe drm versions
define mock drm xe in inl file to provide xe definitions for mock members
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
- this feature is part of making compute walker command view
- compute walker is programed for implicit scaling but not dispatched
- together with new flag, comes the refactor to reduce number of arguments
Related-To: NEO-11972
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
when no subslice info provided, assume max subslices per slice are enabled
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
The dependency towards `Drm` is unnecessary and only makes testing more
difficult. Instead, dependency towards `IoctlHelper` alone only is
sufficient.
Related-To: NEO-10158
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
Implemented device property query API for determining
support capabilities regarding 2d-block-load-tranpose
features for which not all Intel devices support.
Related-To: NEO-11592
Signed-off-by: Jack Myers <jack.myers@intel.com>
add fallback to get max eu per ss from topology if not available in other way
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
firstly, setup hw info using product specific functions
secondly, query system info from GuC to setup max values
then, query memory info
then, query engine info as it depends on memory info
then, query topology as it depends on engine info
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Related-To: NEO-12124
If queue is OOQ and there are no cross-engine dependencies,
don't flush CCS before submitting copy on BCS.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
support for DRM_XE_VM_BIND_FLAG_IMMEDIATE and DRM_XE_VM_BIND_FLAG_READONLY
Fixes: #717
Related-To: NEO-10958
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
firstly, setup hw info using product specific functions
secondly, query system info from GuC to setup max values
thirdly, query topology to setup current topology data
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
