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ce7742542805a628cbc4693e879e9018bb76c0bf
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385 Commits

Author SHA1 Message Date
Mrozek, Michal
ce77425428 Add support for reserveGpuVirtualAddress. 
Change-Id: I068df0dd3b2064cdb93be1c4408eeb86ff264d2f
 2019-02-26 12:01:17 +01:00
Zdunowski, Piotr
842fb5dadc [4/n] Log allocation placement. 
Change-Id: I300be5f09b6ee77aa89584a6bddf4c7e57aa54f1
 2019-02-26 10:21:42 +01:00
Piotr Fusik
378bd28bab Change the signature of MemoryManager::createGraphicsAllocation. 
Change-Id: Ia82235ff2831fd5b3436d488a5946bb49d63ce91
 2019-02-25 16:08:35 +01:00
dongwonk
b44d434a89 limited GPU range is used for external 32bit allocation 
Change-Id: I494ad97fb1ddfa7b3c6b2e7cef2ae04fba571ba0
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 16:26:49 -08:00
dongwonk
56972935ad graphic memory allocation with alignment in limited Range heap 
Change-Id: Iccfb0fdc2f161e30bfdd26154110185277f176f5
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 10:10:47 -08:00
Piotr Fusik
4ec5be0c99 Simplify code by removing AllocationOrigin. 
Change-Id: Ie73cefc1ae1ee846fb9a5ef1054af01cd1867a4d
 2019-02-21 16:29:05 +01:00
Mrozek, Michal
a1d4c07f45 Simplify DRM allocation constructors. 
Change-Id: I2c477ce85f4748f0637451a405f7949aa829ba81
 2019-02-21 12:06:01 +01:00
Mrozek, Michal
45a0ceecfb Clean drm interfaces. 
- all driver allocations are using SoftPin
- remove unneeded methods.
- remove unneeded members.
- remove unneeded code paths.

Change-Id: I3369c0a4d37727210b5a26271d25537ca5218bd4
 2019-02-20 16:11:19 +01:00
Katarzyna Cencelewska
c9a8f9b1be GlSharingFunction tests update 
Add mock of opengl32.dll to check that sharing functions are loaded

Change-Id: I361707ee9a506e84db51d4fa9c98823db2550fae
 2019-02-20 16:05:32 +01:00
Piotr Fusik
75edea81bb Virtual address space partitioning on Linux [2/n] 
Move selectHeap from Wddm to MemoryManager.
Set DrmAllocation::origin.

Change-Id: I5d412e35d524d1f31174893b9ce1d3b1e98eee96
 2019-02-20 14:43:08 +01:00
Mrozek, Michal
4139e88982 Allocate command buffers with proper allocation type. 
Change-Id: I912dd41cf68fa16ab481bb003c4f5ae63f1f04c4
 2019-02-20 12:52:45 +01:00
Dunajski, Bartosz
64fbfb21bf Improve iterating over existing CommandStreamReceivers 
Change-Id: I12a10852d43c625ec5521ae91918fcb12e1a6aec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-19 11:48:56 +01:00
Jablonski, Mateusz
ed6381a66a Use HEAP_STANDARD64Kb when cpu access is required 
Change-Id: I3a451b618f1b72836cd640ed510e874cf2d60624
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-19 10:36:15 +01:00
Jablonski, Mateusz
05d02a6fe7 Change DevicesBitfield type to struct 
Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-18 13:57:50 +01:00
dongwonk
fb993d6107 limited range and internal 32bit allocators with correct base and size 
correct add 1 to the current size, gpuRange as gpuRange
only specifies the end address of the pool, not the actual
size, which causes alignment issue of all the offsets of
allocated objects. Also, a page was added in the beginning
of the limited range memory pool to avoid the base address
of it to be 0x0 that is interpreted as invalid address by
heap allocator (This makes the size reduced by pageSize)

Internal 32bit allocator is also initialized in proper way
with corrected base address.

v2: added 'givenMemoryManagerLimimedRangeAllocator' unit
    test
v3: adjust size to be freed when DrmMemoryManager instance
    is destroyed to 4GB
v4: - defined external 32bit allocator for limited Range
    allocation case.
    - softpinning object on the correct GPU address

Change-Id: Idaa0206d4133a1476cceb5a48ff8c8528742c76a
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-17 19:19:52 +01:00
dongwonk
c2f5fccfd0 DrmAllocation with correct pair of cpu address and gpu address 
correct mapping of cpu and gpu address in memory allocation
in case of NonSVM. Also, used only aligned address since offset
is already calculated and written to "allocationOffset".
gpuBaseAddress is programmed with 0 instead of base address of
heap because it represents GPU's address space.

v2: add allocationOffset to the aligned address in allocation
    data to point to exact starting address of buffer in two
    NonSVM allocation unit tests

Change-Id: I32ef512de64a13459b7c132672f837c5cb210ada
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 19:03:26 +01:00
dongwonk
0240f239ad check if the whole object region is in 32Bit address space boundary 
checks the address + size of buffer object to determine
whether the object is located within 32bit address space
boundary.

v2: changed end year to 2019 in ther license term
v3: added unit test for checking of flag when size of
    bo is given.
v4: two different unit tests are created to cover two
    different case separately

Change-Id: Ie2df6025fc116aca679dcfe88d858ff240278c39
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 16:15:06 +01:00
Dunajski, Bartosz
958d931cd9 Allow to create HardwareContextController for multiple Devices 
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-14 16:00:00 +01:00
Zdanowicz, Zbigniew
8e1e874a76 Refactor headers and reorder include order 
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
 2019-02-14 13:39:01 +01:00
Jablonski, Mateusz
e74b31691c Remove redundant parameter of createWddmAllocation method 
Change-Id: I1c1014eacbdee4ab6b83ea7d7b5257f25f2b46dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-14 07:33:45 +01:00
Piotr Fusik
f014f27370 Support the EnableLocalMemory debug variable in CSR. 
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
 2019-02-12 13:09:23 +01:00
Piotr Fusik
6882cf09c1 Avoid manual memory management. 
Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
 2019-02-12 09:14:51 +01:00
Dunajski, Bartosz
12da1b0616 Remove osContextCount parameter from GraphicsAllocation 
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:44:37 +01:00
Dunajski, Bartosz
dc181defba Use GpuAddress for TimestampPacket programming 
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:31:17 +01:00
Koska, Andrzej
e8771e8c2a Preparing the correct signature of WaitForSynchronizationObject 
Change-Id: I3689791ab0335009d79a3484379945f8741ba32b
 2019-02-08 14:38:31 +01:00
Hoppe, Mateusz
cb37f2a779 Add /we4189 switch to CMAKE_CXX_FLAGS for MSVC. 
- treat unused local variables warnings as error in Debug

Change-Id: I2da08b72e0f0083d3cdf932fbf92ef4981a88615
 2019-02-08 12:06:04 +01:00
Kamil Diedrich
62e56d2398 Disable L3cache when resolve argument 
Change-Id: I4bb3a18d67254eef8aa4a0ce6b29401726f0b47e
 2019-02-06 15:51:31 +01:00
Jablonski, Mateusz
3a9531201a Add missing tests for internal heap index 
Change-Id: If3705ef86c54504c930888829f6e38f88cdbd1ef
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-06 08:33:08 +01:00
Jablonski, Mateusz
e095ac834d Windows: use HEAP_INTERNAL in 32bit scenarios 
Change-Id: I652727303eec45cd3547bd98bec42f276000d9b4
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-05 19:04:06 +01:00
Mateusz Jablonski
16c3117b09 Fix test for internal heap base address of wddm memory manager 
Change-Id: Ia6879ad9637ad38b3d641b0b4522dd1e85b0fb50
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-04 19:05:20 +01:00
Mateusz Jablonski
fff8be32f4 Dont force system memory for internal allocations 
use HEAP_INTERNAL_DEVICE_MEMORY for internal allocations

Change-Id: Id70caa30cd1e9c79df60773227d72b09541e4b77
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:31:34 +01:00
Filip Hazubski
3fe78d263b Update getGraphicsAllocationType 
Change-Id: I7613d0d5550d8032b960f86aa117b4baf6b9216f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-31 11:02:35 +01:00
Mateusz Jablonski
c04ba163a0 Simplify selecting heap in Wddm::mapGpuVirtualAddressImpl method 
Change-Id: Id6eb5b0df1c705b5fadde62d20513fe15edf1e27
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 16:38:46 +01:00
Mateusz Jablonski
f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Mateusz Jablonski
8056d7c5f0 Cleanup headers included in wddm.h 
Change-Id: Ibb9b84b8f1ea2c69ddd134451b06f0e505c841b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-29 12:43:29 +01:00
Hoppe, Mateusz
c870628d08 Rename SHARED_RESOURCE allocation type to SHARED_RESOURCE_COPY 
Change-Id: Ie846450384730171304788bbb1709d7f088036a8
 2019-01-28 16:20:35 +01:00
Zdunowski, Piotr
ecb204f347 [2/n] Log allocation placement. 
Change-Id: I1a523b7b7ed8a3fb199e4a216b5c1dc97b83cd44
 2019-01-28 12:45:22 +01:00
Hoppe, Mateusz
d7ce6ef8d1 Allocate images through preferred pool call 
Change-Id: I79c9c1a0a95a8a3e26ed690530b71ef504cc7ff8
 2019-01-25 09:05:25 +01:00
Mateusz Jablonski
f90cfb9199 Fix typo: freeGpuVirtualAddres -> freeGpuVirtualAddress 
Change-Id: I6cbec2bd4ec5863e2c5df75aa60b3a7a0dbb94c6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 16:08:00 +00:00
Mateusz Jablonski
f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00
Mateusz Jablonski
b229df3cc4 Remove debug flag EnableMakeResidentOnMapGpuVa 
Change-Id: I12063762818ed58861ec80f0d8a798312374d198
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-23 14:43:40 +01:00
Piotr Fusik
40870f9c7d Retry mmap with a smaller size. 
Change-Id: If8ea046af789394c1f58be9cc3a2b8100cee214a
 2019-01-22 11:04:16 +01:00
Mateusz Jablonski
ad3bfd84cb Add functionality to make resident before locking resource 
Change-Id: I0963c1edcb43f409e9dd62cb46a0da1f2b05667b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-22 08:28:12 +01:00
Katarzyna Cencelewska
72f17d6435 Add check that Intel OpenGl is used 
before return device_id in clGetGlContextInfoKHR
Change-Id: Ic6dce407a1666909d468d89a8576c907abc63b61
 2019-01-22 08:10:46 +01:00
Chodor, Jaroslaw
e663d51481 Adding support for debug variables translation 
Additionally, adding flag to override gdi

Change-Id: I52759aa8c5f1149a34167429289d3f3876cdcb92
 2019-01-19 20:12:41 +01:00
Pawel Wilma
dcbdbd92b9 Wait for paging frence after calling makeResident() on mapGpuVa 
Change-Id: I289c4be891b2d7c1b50a0100cbdde8688f3068d5
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-01-17 10:41:28 +01:00
Zdunowski, Piotr
75a635fdc5 [1/n] Log allocation placement. 
Change-Id: I9ab61e10dcb0fcbbaf859c077a64ce7a4f2c213c
 2019-01-16 16:46:50 +01:00
Mateusz Jablonski
06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00
Mrozek, Michal
9cbfa3892d Remove debug flag. 
Change-Id: I013e1f27477d67fd33ba6c559dffb26d06a0db8b
 2019-01-14 15:19:57 +01:00
Dunajski, Bartosz
8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00