This is prep work for the future implementation of pooling these allocations.
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
- Added support for creating and managing opaque IPC NT handles in the
WDDM layer.
- Introduced a new flag `shareableWithoutNTHandle` to indicate if memory
can be shared without an NT handle.
- Updated the `isShareableMemory` method to accommodate this new flag.
- Added debug variable EnableShareableWithoutNTHandle to control the
behavior of sharing memory without NT handles until requested.
- Updated Linux path to enable sharing DMA Buf FDs between processes
for use in pidfd_getfd
- Updated getfd and get IPC Handle helper functions to support opaque or
previous versions
Related-To: NEO-15345 , NEO-15346 , NEO-15347, NEO-10380
Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
- Added support for creating and managing opaque IPC NT handles in the
WDDM layer.
- Introduced a new flag `shareableWithoutNTHandle` to indicate if memory
can be shared without an NT handle.
- Updated the `isShareableMemory` method to accommodate this new flag.
- Added debug variable EnableShareableWithoutNTHandle to control the
behavior of sharing memory without NT handles until requested.
- Updated Linux path to enable sharing DMA Buf FDs between processes
for use in pidfd_getfd
Related-To: NEO-15345 , NEO-15346 , NEO-15347, NEO-10380
Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
- sum total noop size requirement for both in order and noop patchlist
Related-To: NEO-15376
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Reintroducing the original clean up logic back to L0 dllMain,
to address regressions that need further investigating.
Related-To: NEO-14121
Signed-off-by: Oskar Hubert Weber <oskar.hubert.weber@intel.com>
Require tag update on mem copy with external host ptr.
Without this, temporary allocation might not be cleaned before next copy
operation.
If a second copy operation is passed same ptr that has been reallocated,
there will be a pagefault.
Related-To: NEO-15663
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
Related-To: NEO-14360
Flush L2 cache if post sync write from pipe control is being cached.
Otherwise, host will wait for data which is cached on GPU.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
The `appendSynchronizedDispatchInitializationSection()` checks for the
same condition internally.
Related-To: NEO-15374
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
Related-To: NEO-15156, GSD-9939
Support for start address hint in zeVirtualMemReserve.
If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)
Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
In case of optimized CB event, synchronize TS completion only when just
TS node is available, otherwise, if both conuter and TS are available,
synchronize by polling for in order counter. Such situation occurs when
appending non walker operation on platform eligible for optimized Cb
events without dc flush.
Resolves: HSD-18042863956
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
Related-To: NEO-15156, GSD-9939
Support for start address hint in zeVirtualMemReserve.
If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)
Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
