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db12dc78a80d21c72a17637bfb96fc98ccf56610
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818 Commits

Author SHA1 Message Date
Mateusz Jablonski
db12dc78a8 test: reduce gpu hang check period in test expecting gpu hang 
this reduces test execution time by 500 ms

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-08-04 08:49:51 +02:00
Filip Hazubski
12af65a970 fix: Change default value of EnableCpuCacheForResources debug toggle 
This change disables CPU caching for resources
not accessed by CPU for MTL devices.

Related-To: NEO-7194

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-07-31 09:15:43 +02:00
Mateusz Hoppe
997b599168 fix(debugger): pass correct sipAllocation to makeResident 
- sipAllocation for context must be resident in Offline mode

Related-To: NEO-7630

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-07-28 20:51:12 +02:00
Mateusz Jablonski
f84f22d23c refactor: remove unused isSharedContext variable 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-07-26 12:14:23 +02:00
Dunajski, Bartosz
6656e23b86 refactor: unify completion check methods 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-25 14:17:52 +02:00
Dunajski, Bartosz
2c50fd9486 fix: waiting for completion in TBX mode 
- use testTaskCountReady method to check TaskCount value
- download all allocations when TaskCount is ready

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-25 11:54:09 +02:00
Cencelewska, Katarzyna
6f45574ff9 fix: add proper bcs synchronization when marker 
Related-To: NEO-8105
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-24 10:57:41 +02:00
Compute-Runtime-Validation
8c155a2e89 Revert "performance: Memory handling improvements" 
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-07-20 11:37:09 +02:00
Filip Hazubski
5b80bd4d7c performance: Memory handling improvements 
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-07-19 19:21:44 +02:00
Dominik Dabek
622a3ed89c performance(ocl): flag to not dcFlush on no event 
If waitForBarrier is not passed outEvent then do
dcFlush on the next synchronize call.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-07-18 15:38:54 +02:00
Dunajski, Bartosz
815b37bf3a performance: allow waiting for OOQ timestamps in clEnqueueWaitForEvents 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-14 11:33:10 +02:00
Zbigniew Zdanowicz
1c0285a156 fix: correct alignment of per thread scratch size 
Related-To: NEO-5288

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-12 12:31:47 +02:00
Cencelewska, Katarzyna
aa0beb8191 fix: Unify logic calculating threads per work group part 4 
- also use helper when checking that is simd1 to have same flow

Related-To: NEO-8087
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-07 15:34:59 +02:00
Dunajski, Bartosz
00bae2c827 fix: add missing nullptr check 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-07 11:34:49 +02:00
Cencelewska, Katarzyna
61f701aba5 fix: Unify logic calculating threads per work group part 3 
Related-To: NEO-8087
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-04 15:27:44 +02:00
Cencelewska, Katarzyna
7cb3278eb3 fix: add function to calculate number of threads per tg 
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-06-13 14:02:24 +02:00
Mateusz Jablonski
4f72835b7d fix: create dedicated class for root device indices to store unique values 
remove method to removing duplicates from StackVec as the method
implicitly sorted the vector

Related-To: GSD-4692
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-06-12 22:24:06 +02:00
Dunajski, Bartosz
5fe9d70066 feature: new multitile post sync layout for immediate write [1/n] 
No functional changes in this commit. This is prework.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-06-07 13:11:10 +02:00
Kacper Nowak
d05fee8087 fix(ocl): Use GPU address of SVM alloc. when using builtins 
Use GPU address of SVM allocation instead of CPU one. It fixes a bug
visible on platforms, where potentially GPU VA does not have to match
CPU VA.

Related-To: NEO-7970
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2023-05-26 13:39:14 +02:00
Lukasz Jobczyk
0e758e4bb5 performance: Add debug flag to set BCS split minimal size 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-05-17 08:07:43 +02:00
Lukasz Jobczyk
9f755b54ad performance: Bidirectional BCS split implementation for OCL 
Related-To: NEO-7877

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-05-16 13:34:18 +02:00
Mateusz Jablonski
425a2a6fa2 fix: set NotLockable flag when resource does not need to be lockable 
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-15 16:47:21 +02:00
Naklicki, Mateusz
71e5c76d67 fix: remove explicit AgeBased Thread Arbitration policy 
Related-To: NEO-7913
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
 2023-05-15 09:58:04 +02:00
Compute-Runtime-Validation
57851a5d29 Revert "fix: set NotLockable flag when resource does not need to be lockable" 
This reverts commit c597b03a33.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-05-14 04:55:30 +02:00
Mateusz Jablonski
c597b03a33 fix: set NotLockable flag when resource does not need to be lockable 
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-12 13:15:50 +02:00
Compute-Runtime-Validation
9bf472839d Revert "fix: set NotLockable flag when resource does not need to be lockable" 
This reverts commit 50c67a759e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-05-11 18:23:55 +02:00
Mateusz Jablonski
50c67a759e fix: set NotLockable flag when resource does not need to be lockable 
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-11 13:47:15 +02:00
Filip Hazubski
c4a80e193a Revert "fix: set NotLockable flag when resource doesn't need to be lockable" 
This reverts commit 7b2af39fd6.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-05-11 09:17:34 +02:00
Mateusz Jablonski
7b2af39fd6 fix: set NotLockable flag when resource doesn't need to be lockable 
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-10 10:16:24 +02:00
Lu, Wenbin
5d653c8536 fix: Add alignment support to createUnifiedMemoryAllocation 
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
 2023-05-02 09:19:23 +02:00
Diedrich, Kamil
5149d74141 refactor: Remove globaly enabled cl_cache 
Current behaviour will be detecd path existence

Related-To: NEO-4262

Signed-off-by: Diedrich, Kamil <kamil.diedrich@intel.com>
 2023-04-28 23:28:49 +02:00
Fabian Zwolinski
cbce863dc2 refactor: Rename member variables to camelCase 3/n 
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-28 16:01:14 +02:00
Maciej Plewka
464c67789f fix: Deffer timestamp packet after failed submission 
Related-To: NEO-7835

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2023-04-28 12:25:32 +02:00
Fabian Zwolinski
e351a90f81 refactor: Rename member variables to camelCase 2/n 
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-27 20:39:22 +02:00
Fabian Zwolinski
c441e9e971 refactor: Rename member variables to camelCase 
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-26 16:05:07 +02:00
Fabian Zwolinski
2022592f3d Apply CamelCase for class and struct names 2/2 
Additionally change .clang-tidy not to ignore struct names.

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-25 13:10:23 +02:00
Fabian Zwolinski
e2e00413a8 Apply CamelCase for class and struct names 
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-04-24 15:36:27 +02:00
Andrzej Koska
b22f3f0796 Fix for handling incorrect patchSize in patchWithRequiredSize 
This fix adds additional size control to patched memory

Related-To: NEO-7760
Signed-off-by: Andrzej Koska <andrzej.koska@intel.com>
 2023-04-20 16:07:45 +02:00
Cencelewska, Katarzyna
ac8ac62c92 fix: add bcs engine type only if engine exist 
- check bcs availability before insert to bcsEnginesTypes

Resolves: NEO-7886
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-04-20 09:02:38 +02:00
Kacper Nowak
7be2ac84d3 Refactor(ocl): refactor OCL Kernel and MultiDeviceKernel class 1/n 
- For static create() method for Kernel and MultiDeviceKernel force errcodeRet
parameter to be passed via reference (instead of a pointer)
- Move part of kernel's creation logic to initialize() method

Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2023-04-11 11:43:26 +02:00
Milczarek, Slawomir
01d03aa5b6 Extended regkey to force prefetch of shared memory in enqueue commands 
Extended the regkey ForceMemoryPrefetchForKmdMigratedSharedAllocations
to force meory prefetch of kmd-migrated shared allocation
in clEnqueueNDRangeKernel(), clEnqueueMemFillINTEL, ...

Related-To: NEO-7841

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2023-04-11 11:23:48 +02:00
Mateusz Jablonski
31f32cc16e fix implicit args: generate local ids as for grf size 32 
Related-To: IGC-6936

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-04-07 11:37:07 +02:00
Compute-Runtime-Validation
2b93126795 Revert "Add alignment support to createUnifiedMemoryAllocation" 
This reverts commit ca02bbba4b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-03-30 15:43:47 +02:00
Lukasz Jobczyk
18e5664c88 Set stalling command for split marker 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-03-29 15:34:45 +02:00
Lu, Wenbin
ca02bbba4b Add alignment support to createUnifiedMemoryAllocation 
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
 2023-03-28 10:57:04 +02:00
Dominik Dabek
d7981e153e fix(ocl): tweak resolve deps with pipecontrols 
Keep resolving with semaphores if multiple (>2) queues are submitting to
the same CSR. In such case, semaphores allow concurrent execution while
pipecontrols would serialize it.

Related-To: NEO-7321

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-03-27 17:22:03 +02:00
Dunajski, Bartosz
f522744886 OCL: Allow for RelaxedOrdering barriers in IOQ mode 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-03-27 12:25:01 +02:00
Dominik Dabek
a634c6a7b1 fix:pass bool to get CS size instead of reevaluate 
Pass resolveDependenciesByPipecontrol bool value to get command stream
methods instead of reevaluating the condition.

Related-To: NEO-7321

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-03-24 15:24:10 +01:00
Dunajski, Bartosz
b3c2fa41c5 OCL: Optimize IOQ barriers handling 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-03-24 12:52:47 +01:00
Dunajski, Bartosz
73213c961f Enable RelaxedOrdering for OCL on GPGPU engine 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-03-22 12:39:52 +01:00