Commit Graph

392 Commits

Author SHA1 Message Date
Szymon Morek
6a11e8a077 fix: revert changes around zero-copy
Related-To: NEO-12018

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-19 12:29:18 +02:00
Szymon Morek
35cbbfe43a performance: Don't wait for taskCount for indirect allocs
Related-To: GSD-9385

In case of indirect allocations, we don't really know
their task count because we can't track their true usage
on GPU.
In case of non-blocking free, don't wait for latestSentTaskCount.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-10 15:51:04 +02:00
Szymon Morek
7d25965a78 performance: change buffer type for new coherency model
Related-To: NEO-11882

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-09 09:33:53 +02:00
Szymon Morek
3dd051c3ee performance: adjust compression handling
Related-To: NEO-11882

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-03 09:37:11 +02:00
Szymon Morek
6df46aa062 performance: Iterate over indirect allocations once
Related-To: NEO-11228

Iterate only on new allocations when making indirect
allocations resident.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-05-06 15:51:37 +02:00
Mateusz Jablonski
de93bc6928 refactor: correct naming of enum class constants 10/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 11:30:39 +01:00
Mateusz Jablonski
dd1b9d6abc refactor: correct naming of enum class constants 8/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 08:18:18 +01:00
Mateusz Jablonski
27fbdde4c5 refactor: correct naming of unified memory enums
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 15:58:21 +01:00
Mateusz Jablonski
01dd503e47 refactor: correct naming of MemoryPool enum values
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 07:51:39 +01:00
Mateusz Jablonski
0428c0acd1 refactor: correct naming of HeapIndex enum values
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-12 11:46:17 +01:00
Mateusz Jablonski
b182917d9d refactor: correct naming of allocation types
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-11 16:23:37 +01:00
Mateusz Jablonski
3695e63f9d refactor: correct naming of internal usm flags
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-04 17:10:40 +01:00
Mateusz Jablonski
c9664e6bad refactor: rename global debug manager to debugManager
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-30 13:00:59 +01:00
Dominik Dabek
961a8d91d0 refactor: move gmm constructor flags to struct
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-15 09:26:13 +01:00
Mateusz Hoppe
97faeae16f feature: heapAssigner per root device
- create heapAssigner per root device in memory manager to allow per
device config

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-10-19 19:52:24 +02:00
Lukasz Jobczyk
3ab72e7d79 fix: Align svm cpu to alignment passed to properties
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-08-11 14:57:49 +02:00
Compute-Runtime-Validation
820e94e89c Revert "fix: Align svm cpu to alignment passed to properties"
This reverts commit d66da494d4.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-08-11 07:14:30 +02:00
Lukasz Jobczyk
d66da494d4 fix: Align svm cpu to alignment passed to properties
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-08-09 11:52:21 +02:00
Mateusz Jablonski
f84f22d23c refactor: remove unused isSharedContext variable
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-07-26 12:14:23 +02:00
Milczarek, Slawomir
027c51d396 feature: Add CPU side USM allocation to trim candidate list on page fault
Enable eviction of CPU side USM allocation for UMD migrations on Windows.
Reverts incorrect auto-revert commit 218de586a4f28b1de3e983b9006e7a99d3a4d10e.

Related-To: NEO-8015

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2023-07-25 15:21:12 +02:00
Compute-Runtime-Validation
918b41d26d Revert "feature: Add CPU side USM allocation to trim candidate list on page f...
This reverts commit 60a4448a07.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-07-24 08:44:22 +02:00
Milczarek, Slawomir
60a4448a07 feature: Add CPU side USM allocation to trim candidate list on page fage fault
Enable eviction of CPU side USM allocation for UMD migrations on Windows.

Related-To: NEO-8015
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2023-07-23 10:24:28 +02:00
Compute-Runtime-Validation
8c155a2e89 Revert "performance: Memory handling improvements"
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-07-20 11:37:09 +02:00
Filip Hazubski
5b80bd4d7c performance: Memory handling improvements
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-19 19:21:44 +02:00
Mateusz Jablonski
33261d36bc refactor: rename ocl test files
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-07-18 16:46:33 +02:00
Mateusz Jablonski
f363463e2d test: move memory manager tests from OCL to shared
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-07-17 14:53:16 +02:00
Mateusz Jablonski
4f72835b7d fix: create dedicated class for root device indices to store unique values
remove method to removing duplicates from StackVec as the method
implicitly sorted the vector

Related-To: GSD-4692
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-06-12 22:24:06 +02:00
Neil R Spruit
ded9d7bff2 feature: Get Peer Allocation with specified base Pointer
Related-To: LOCI-4176

- Given a Base Pointer passed into Get Peer Allocation, then the base
pointer is used in the map of the new allocation to the virtual memory.
- Enables users to use the same pointer for all devices in Peer To Peer.
- Currently unsupported on reserved memory due to mapped and exec
resiedency of Virtual addresses.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2023-05-24 20:41:20 +02:00
Mateusz Jablonski
425a2a6fa2 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-15 16:47:21 +02:00
Compute-Runtime-Validation
57851a5d29 Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit c597b03a33.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-14 04:55:30 +02:00
Mateusz Jablonski
c597b03a33 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-12 13:15:50 +02:00
Compute-Runtime-Validation
9bf472839d Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit 50c67a759e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-11 18:23:55 +02:00
Mateusz Jablonski
50c67a759e fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-11 13:47:15 +02:00
Filip Hazubski
c4a80e193a Revert "fix: set NotLockable flag when resource doesn't need to be lockable"
This reverts commit 7b2af39fd6.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-05-11 09:17:34 +02:00
Mateusz Jablonski
7b2af39fd6 fix: set NotLockable flag when resource doesn't need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-10 10:16:24 +02:00
Lu, Wenbin
5d653c8536 fix: Add alignment support to createUnifiedMemoryAllocation
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
2023-05-02 09:19:23 +02:00
Fabian Zwolinski
cbce863dc2 refactor: Rename member variables to camelCase 3/n
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-28 16:01:14 +02:00
Fabian Zwolinski
e351a90f81 refactor: Rename member variables to camelCase 2/n
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-27 20:39:22 +02:00
Mateusz Jablonski
2f9135a4e6 fix: change type of container with registered engines per root device
use StackVec instead of unordered map
resize container at MemoryManager's creation time

Related-To: NEO-7925
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-27 17:06:42 +02:00
Mateusz Jablonski
32d8a3bc6d fix: store registered engines per root device
in most cases we need to iterate over engines associated to single root device

Related-To: NEO-7925
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-27 10:54:07 +02:00
Mateusz Jablonski
ea15b78a53 perf multi device ocl: reduce number of waitOnCpu calls when migrating memory
don't wait on cpu when migrate within same root device

Related-To: NEO-7552
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-04 11:23:03 +02:00
Compute-Runtime-Validation
2b93126795 Revert "Add alignment support to createUnifiedMemoryAllocation"
This reverts commit ca02bbba4b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-03-30 15:43:47 +02:00
Lu, Wenbin
ca02bbba4b Add alignment support to createUnifiedMemoryAllocation
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
2023-03-28 10:57:04 +02:00
Filip Hazubski
0bee81c0c0 refactor: Move isLinearStoragePreferred function from gfx to product helper
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-03-15 18:51:59 +01:00
Kamil Kopryk
fa8579602f refactor: rename product helper files n/n
Related-To: NEO-7703
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-03-10 13:24:38 +01:00
Spruit, Neil R
86e739e9dc feature: Relaxed Virtual Memory reservation with pStart
Related-To: LOCI-3871

- Relaxed the Virtual Memory Reservation to allow pStart and not fail if
the pStart value is not obtained.
- Moves checks on pStart to the user to check and determine if they want
to re-reserve or use the address allocated.
- Changed reserveGpuAddress to use unit64_t type to allow internal
address range structure assignment without cast.

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2023-03-08 08:06:50 +01:00
Mateusz Jablonski
8cb4fafd81 test OCL: correct test for device USM
Related-To: NEO-7737
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-02-21 14:54:02 +01:00
Wrobel, Patryk
d8a65c6958 Try to use provided pointer when dual storage shared memory is not supported
If user provided not-null hostptr field, then the driver
should try to use it. This change adds omitted functionality,
which handles the described case also in createUnifiedMemoryAllocation().

Related-To: NEO-7600
Signed-off-by: Wrobel, Patryk <patryk.wrobel@intel.com>
2023-02-21 09:08:11 +01:00
Warchulski, Jaroslaw
0556d543a3 Cleanup includes 56
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-02-16 14:42:44 +01:00
Neil Spruit
2aaebddb37 Revert "Heap allocation allow base address and growable addresses"
This reverts commit 44ec497b1a.

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2023-02-15 18:34:40 +01:00