- add `hasImageWriteArg` flag to KernelDescriptor,
based on image access qualifier
- add `isPostImageWriteFlushRequired` method to productHelper,
to require cache flush only on selected platforms
- if possible, add the `textureCacheInvalidationEnable` arg to the
existing PC, otherwise add a new PC
Related-To: NEO-13427, HSD-18041321008
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
Refactored various member variables in EncodeDispatchKernel to directly
include EncodePostSync
Changed command encoder and command list to use the modified
EncodeDispatchKernel.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
Related-To: NEO-13715
Implements basic functionality for zeCommandListAppendMemoryAdvise for
system allocator
Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
Compressed memory can't be compared using expectMemory api.
Instead, compressed memory is transferred to usm host.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
Max programmable slm size is stored in RuntimeCapabilityTable as slmSize.
That is misleading name
Rename the variable slmSize to better reflect the actual meaning of the member.
Related-To: NEO-12949
Signed-off-by: Marcel Skierkowski <marcel.skierkowski@intel.com>
Return early and provide justification, otherwise SIGBUS error is
returned.
Related-To: NEO-14506
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
This change caches the most used MOCS values:
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED);
inside gmmHelper class during initialization to avoid repeated
calls of virtual functions, branches and/or gmm lib access.
and adds more readably corresponding getters:
* getL1EnabledMOCS
* getL3EnabledMOCS
* getUncachedMOCS
If force all resources uncached is called,
these 3 cached mocs values are reinitialized
It also changes the order of gmmHelper members, to avoid
not needed padding after addressWidth
and simplifies logic in getMocsIndex function
for xehp and later products.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Functions: fileExists and loadDataToFile
use IO functions from namespace IoFunctions
Now tests that use these functions
are mocked by default,
but some still require access to real files
and have been restored the ability to read files.
They will be mocked in next PRs.
Related-To: NEO-7006
Signed-off-by: Marcel Skierkowski <marcel.skierkowski@intel.com>
Fixed a clang-format error on unassigned value comparison with
one of command_encoder tests for gen12lp
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
- immediate flush does not need to perform below for command list execution
- handling indirect allocations
- performing page fault migration
- making residency of unified shared memory
- perform prefetching when required
Related-To: NEO-10356
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Align local memory allocations of tag types to 2MB when
2MB alignment is enabled via the product helper
(is2MBLocalMemAlignmentEnabled flag).
Refactored the allocateGraphicsMemoryInDevicePool function to improve
readability and maintainability. Simplified the logic for
determining base size and final alignment by reducing redundant code.
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
In case of indirect kernel launch some payload arguments are patched
just before walker command, this change disables prefetch, performs
batch buffer start to next bytes and then re-enable prefetch. All these
operations are performed between MI_STORE_REGISTER_MEM and COMPUTE_WALKER
Related-To: NEO-14584
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Created EncodePostSync template struct to organize various post-sync
variables/functions from EncodeDispatchKernel
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
