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f0f89836e0554cc6bc38caa615495d3d9afbb038
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842 Commits

Author SHA1 Message Date
Kamil Kopryk
f0f89836e0 fix: l3 flush after post sync logic in OCL 
Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-06-23 18:03:21 +02:00
Mateusz Jablonski
0c066b4266 refactor: remove C-style casts 1/n 
Related-To: NEO-15174
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-06-17 17:50:56 +02:00
Szymon Morek
ac7d936942 fix: invalidate texture cache for BCS image write 
Related-To: NEO-15029

If BCS is writing new data to an image, texture cache
should be invalidated as it might contain stale data for
that image.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-06-13 13:28:08 +02:00
Mateusz Jablonski
0a325e09be fix: correct initialization of Kernel::isBuiltIn 
value is used in Kernel::initialize but was set after initialize call

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-06-11 18:29:06 +02:00
Kamil Kopryk
bb52c358b9 refactor: flush Task method 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-15011

Also correct ults
 2025-06-11 16:36:56 +02:00
Szymon Morek
26a83c9f2c refactor: remove redundant specializations 
Related-To: NEO-15029

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-06-09 19:30:30 +02:00
Mateusz Hoppe
f1f3ee13db refactor: set argsExtended in EncodeWalkerArgs 
Related-To: NEO-14209

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2025-06-03 11:45:39 +02:00
Compute-Runtime-Validation
1a50e8e7c0 Revert "performance: use RESOURCE_BARRIER as stalling barrier" 
This reverts commit 556c0b64c6.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-05-30 18:00:34 +02:00
Szymon Morek
556c0b64c6 performance: use RESOURCE_BARRIER as stalling barrier 
Related-To: NEO-14943

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-05-28 12:30:01 +02:00
Maciej Plewka
e6f3ebce5d fix: add pc with stall before barrier with post sync on bmg 
Related-To: NEO-14491
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-05-28 09:24:21 +02:00
Kamil Kopryk
b7681a2e7b refactor: redirect flush L3 host usm to external by default 
Related-To: NEO-13163

Rename ForceL3FlushAfterPostSync to EnableL3FlushAfterPostSync
Rename DisableFlushL3ForHostUsm to RedirectFlushL3HostUsmToExternal

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-05-28 08:50:01 +02:00
Lukasz Jobczyk
86e7d5b276 performance: Skip fence after PC when no post sync write 
Related-To: NEO-14642

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-05-23 10:33:28 +02:00
Mateusz Hoppe
0d57dcfdf0 feature: add L0 API querying priority levels - zeDeviceGetPriorityLevels() 
Related-To: NEO-14572

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2025-05-23 09:24:16 +02:00
Kamil Kopryk
caf1781e73 fix: add L3 flush after post sync for zero copy mem objects 
Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-05-22 10:23:26 +02:00
Mateusz Hoppe
b03f625f03 feature: limit max LWS based on preferred number of workgroups per ss 
- limit max LWS size when SLM and barriers are not used

Related-To: GSD-11112

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2025-05-16 20:28:00 +02:00
Compute-Runtime-Validation
8839d62c79 Revert "performance: use RESOURCE_BARRIER as stalling barrier" 
This reverts commit 2a63853349.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-05-16 20:19:06 +02:00
Szymon Morek
2a63853349 performance: use RESOURCE_BARRIER as stalling barrier 
Related-To: NEO-14943

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-05-16 14:12:18 +02:00
Szymon Morek
bff8f74de7 refactor: remove unused parameter 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-05-15 12:23:27 +02:00
Maciej Plewka
85ed1a15e4 fix: do not allow blit for depth image on arl 
Related-To: NEO-14344
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-05-13 15:56:47 +02:00
Lukasz Jobczyk
df2c776aab refactor: Remove unused cmdq round robin engine assign 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-05-09 11:03:57 +02:00
Lukasz Jobczyk
1d1414febc refactor: remove unused dc flush mitigation 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-05-09 08:26:26 +02:00
Lukasz Jobczyk
62619f9525 refactor: remove unused kernel tunning 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-05-08 14:18:21 +02:00
Filip Hazubski
ba85f7417d fix: Add debug toggle to disable flush L3 for host usm 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2025-05-07 16:57:31 +02:00
Szymon Morek
4d60465a9e fix: don't flush texture cache if not required 
Related-To: NEO-14645

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-16 10:38:24 +02:00
Jaroslaw Warchulski
3e1aa33924 refactor: cleanup headers 
Related-To: NEO-5548
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
 2025-04-14 14:59:40 +02:00
Igor Venevtsev
ef52479ce4 feature: add FillImage1dBuffer built-in kernel 
Resolves: NEO-13984, HSD-18041422852

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2025-04-10 14:04:13 +02:00
Szymon Morek
73ad369b10 fix: invalidate texture cache before reading from image 
Related-To: NEO-9004

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-09 14:01:22 +02:00
Young Jin Yoon
0de024dbf9 refactor: separate post-sync into EncodePostSync 
Created EncodePostSync template struct to organize various post-sync
variables/functions from EncodeDispatchKernel

Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2025-04-07 20:06:14 +02:00
Lukasz Jobczyk
8978ea5e5a performance: Do not create global fence allocation on integrated 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-04-07 11:22:04 +02:00
Szymon Morek
91ff22f255 fix: correctly calculate host ptr size for images 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-04 17:54:42 +02:00
Szymon Morek
95e0244f70 fix: properly pass info about 3D image 
Related-To: NEO-14538

It's valid for 3D image to copy 2D region.
Current checks for mip map do not consider that.
This change correctly checks for mip mapped 3D image.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-03 16:33:57 +02:00
Filip Hazubski
504440fc4d feature: Add ftrHeaplessMode flag 
Pass hwInfo to isHeaplessModeEnabled and isForceBindlessRequired functions.

Related-To: NEO-14526

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2025-04-02 21:06:05 +02:00
Szymon Morek
8836f6df0b fix: forward mip map level for 3D images 
Related-To: NEO-14539

1D and 2D images have already mip map level set correctly.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-02 11:46:41 +02:00
Szymon Morek
f1b789cbb1 performance: enable staging for 3d images 
Related-To: NEO-14026

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-01 16:32:41 +02:00
Szymon Morek
3010af596e performance: add infrastructure for staging with 3D images 
Related-To: NEO-14026

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-04-01 15:30:30 +02:00
Lukasz Jobczyk
0a11a96a53 refactor: Add dedicated method to check if any ULLS light enabled 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-03-31 16:36:20 +02:00
Jack Myers
0aa2c4f0cb feature: allow removal of heapful code paths 
Related-To: NEO-13007

Signed-off-by: Jack Myers <jack.myers@intel.com>
 2025-03-27 01:34:35 +01:00
Szymon Morek
d04ac3d60f fix: flush caches after filling image 
Related-To: NEO-14454

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-03-25 15:00:54 +01:00
Damian Tomczak
6e05c35878 feature: force stateless for copy buffer 
Related-to: NEO-6075

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2025-03-24 14:29:25 +01:00
Damian Tomczak
b5a5f35339 feature: force stateless for copy buffer rect 
Related-to: NEO-6075

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2025-03-24 14:14:44 +01:00
Damian Tomczak
d04abc086b fix: adjust svm builtins types 
Related-to: NEO-13973

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2025-03-24 13:55:48 +01:00
Kamil Kopryk
73795ced64 refactor: add setupTimestampPacketFlushL3 function 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-03-24 13:10:03 +01:00
Lukasz Jobczyk
8a85a96ed2 feature: Add 3-level wait scheme with tpause intrinsic 
Related-To: NEO-14336

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-03-21 12:12:57 +01:00
Damian Tomczak
1995a7fbcf feature: additional fixes to enable feature and adjusting builtins types 
Resolves: NEO-13973

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2025-03-20 14:23:08 +01:00
Kamil Kopryk
2e729bcb4c refactor: move isTimestampWaitSupportedForQueues to productHelper 
Related-to: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-03-19 09:31:33 +01:00
Compute-Runtime-Validation
ce2fbb87ba Revert "feature: additional checkers to enable feature" 
This reverts commit dbd7d00b27.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-03-18 03:12:47 +01:00
Damian Tomczak
dbd7d00b27 feature: additional checkers to enable feature 
Resolves: NEO-13973

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2025-03-17 23:32:21 +01:00
Szymon Morek
9432c7f005 fix: program texture cache flush before BCS copy 
Related-To: NEO-13456

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-03-12 14:41:15 +01:00
Szymon Morek
dacbce7f01 performance: introduce staging read for cl_buffer 
Related-To: NEO-14026

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-03-11 08:19:28 +01:00
Compute-Runtime-Validation
571e0f2ba3 Revert "performance: enable staging read for cl_buffer" 
This reverts commit 04b6e87869.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-03-07 20:30:54 +01:00