Commit Graph

357 Commits

Author SHA1 Message Date
Mrozek, Michal
fca7b4e044 Remove Drm32Bit allocator.
- not used anymore.

Change-Id: Ibb7da1758feb67224ac0b172c72f45c2f1c229d9
2019-02-27 14:28:16 +01:00
Filip Hazubski
8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
Mateusz Hoppe
d5d177dd58 Override AllocateGraphicsMemoryInDevicePool in DrmMemoryManager
Change-Id: I54da682ecb055e71af0968872ddb0ec7726c3adc
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2019-02-27 10:05:46 +01:00
Piotr Fusik
d79f1afdc2 GraphicsAllocation constructor accepts allocationType and memoryPool.
Change-Id: I5044ed26ba0cb0fc9ca7077595f5ab56353ab58c
2019-02-26 13:29:25 +01:00
Zdunowski, Piotr
842fb5dadc [4/n] Log allocation placement.
Change-Id: I300be5f09b6ee77aa89584a6bddf4c7e57aa54f1
2019-02-26 10:21:42 +01:00
Piotr Fusik
378bd28bab Change the signature of MemoryManager::createGraphicsAllocation.
Change-Id: Ia82235ff2831fd5b3436d488a5946bb49d63ce91
2019-02-25 16:08:35 +01:00
dongwonk
e030c9907e Abort if can't load from test-file
Change-Id: Id9deef8f088ad7a20770fbb6e49c1fbd4ac96cfb
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-23 10:14:05 +01:00
Milczarek, Slawomir
278bb83c56 Enable AUB sub-capture in AubStream captures (1/n)
Change-Id: I6bd0605d06cf4dc3937e2dbeba7ed7037ae91476
2019-02-21 22:40:40 +01:00
dongwonk
56972935ad graphic memory allocation with alignment in limited Range heap
Change-Id: Iccfb0fdc2f161e30bfdd26154110185277f176f5
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-21 10:10:47 -08:00
Piotr Fusik
4ec5be0c99 Simplify code by removing AllocationOrigin.
Change-Id: Ie73cefc1ae1ee846fb9a5ef1054af01cd1867a4d
2019-02-21 16:29:05 +01:00
Hoppe, Mateusz
98db6147d8 Pass full aubfile name to initAubCenter when using TBX with AubDump
Change-Id: I9184ce38cd9a066259bbf3a5b8a56694d4e309b4
2019-02-21 12:39:10 +01:00
Jablonski, Mateusz
9e7c30cb06 Choose Standard or Standard64 heap depending on 64KB suitablity of resource
Change-Id: I633b1bef1cdef2c5149909c997adc85434bcaf73
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-21 12:18:26 +01:00
Katarzyna Cencelewska
c9a8f9b1be GlSharingFunction tests update
Add mock of opengl32.dll to check that sharing functions are loaded

Change-Id: I361707ee9a506e84db51d4fa9c98823db2550fae
2019-02-20 16:05:32 +01:00
Dunajski, Bartosz
5dae27877e Improve MockCommandQueueHw
Change-Id: I6e33cd48590abd75e768a77a1811f2b374e22bca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-20 10:21:20 +01:00
Dunajski, Bartosz
64fbfb21bf Improve iterating over existing CommandStreamReceivers
Change-Id: I12a10852d43c625ec5521ae91918fcb12e1a6aec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-19 11:48:56 +01:00
Jablonski, Mateusz
05d02a6fe7 Change DevicesBitfield type to struct
Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-18 13:57:50 +01:00
Piotr Fusik
9af011809f Make HeapIndex and GraphicsAllocation::origin not specific to Windows.
Change-Id: Ie5a26b45c0b5eff0daf047361d8c992bd3c65ba7
2019-02-18 08:47:49 +01:00
dongwonk
fb993d6107 limited range and internal 32bit allocators with correct base and size
correct add 1 to the current size, gpuRange as gpuRange
only specifies the end address of the pool, not the actual
size, which causes alignment issue of all the offsets of
allocated objects. Also, a page was added in the beginning
of the limited range memory pool to avoid the base address
of it to be 0x0 that is interpreted as invalid address by
heap allocator (This makes the size reduced by pageSize)

Internal 32bit allocator is also initialized in proper way
with corrected base address.

v2: added 'givenMemoryManagerLimimedRangeAllocator' unit
    test
v3: adjust size to be freed when DrmMemoryManager instance
    is destroyed to 4GB
v4: - defined external 32bit allocator for limited Range
    allocation case.
    - softpinning object on the correct GPU address

Change-Id: Idaa0206d4133a1476cceb5a48ff8c8528742c76a
Signed-off-by: dongwonk <dongwon.kim@intel.com>
2019-02-17 19:19:52 +01:00
Pawel Wilma
8272b3f3de Add missing numGrfRequired in blocked kernel DispatchFlags
Change-Id: Ic1ddd532d8420c9a797a561cc5cb8ee74831eeaa
2019-02-16 11:37:48 +01:00
Dunajski, Bartosz
958d931cd9 Allow to create HardwareContextController for multiple Devices
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-14 16:00:00 +01:00
Jobczyk, Lukasz
b44c60ddc0 Use GPU addresses when setting up scheduler kernel's SVM args
Change-Id: Ia2d67d031ffce2413dd8c73d87c9d3d8f3d71ede
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-02-14 07:21:31 +01:00
Hoppe, Mateusz
0f36265f55 Pass CsrType to initAubCenter
- create AubManager with correct mode

Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
2019-02-13 09:48:05 +01:00
Jablonski, Mateusz
db8c2bc57e Unify write memory in simulated csr when aub manager is available
Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-12 14:43:26 +01:00
Milczarek, Slawomir
e318156d9d Create AubManager with product family in parameter
Change-Id: I3d5a2b04278d3dcec75eb2a787ec98d1ca2304ea
2019-02-12 14:01:23 +01:00
Piotr Fusik
f014f27370 Support the EnableLocalMemory debug variable in CSR.
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
2019-02-12 13:09:23 +01:00
Mrozek, Michal
0e7fd2ffed Add multiEngine field to command queue with debug variable to override it.
Change-Id: I3c1e424a7ad545e166e178d1726595e6d9502ca7
2019-02-12 12:22:24 +01:00
Kamil Diedrich
a7b46ccdbd Add RAII for cl_objects
- add removeVirtualEvent to cmdQueue fixture
- add const keyword in event functions

Change-Id: I11354eb8fceb15ae2c58bddd327863a15aab6393
2019-02-12 11:19:35 +01:00
Maciej Plewka
5abda619a1 Set pitch and qPitch for unified multisample images
Change-Id: I4eaf8678077f7ecd7f5f9ec860a3e59b7e89e78c
2019-02-11 15:52:18 +01:00
Dunajski, Bartosz
12da1b0616 Remove osContextCount parameter from GraphicsAllocation
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:44:37 +01:00
Chodor, Jaroslaw
43856e88b5 Refactor around cache flush and command queue
Change-Id: I277e27cbc60fbbb015c0024f171697408879ec0b
2019-02-10 17:59:33 +01:00
Hoppe, Mateusz
cb37f2a779 Add /we4189 switch to CMAKE_CXX_FLAGS for MSVC.
- treat unused local variables warnings as error in Debug

Change-Id: I2da08b72e0f0083d3cdf932fbf92ef4981a88615
2019-02-08 12:06:04 +01:00
Pawel Wilma
947794f166 Fix for setting context flags in AubDump
Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
2019-02-07 16:28:53 +01:00
Kamil Diedrich
62e56d2398 Disable L3cache when resolve argument
Change-Id: I4bb3a18d67254eef8aa4a0ce6b29401726f0b47e
2019-02-06 15:51:31 +01:00
Chodor, Jaroslaw
048098ce66 Refactor around cache flush after walker
Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
2019-02-06 11:12:55 +01:00
Maciej Dziuban
ea8aa29e12 Change pollForCompletion() insertion locations
Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls

Poll is not done on flush

Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-02-05 14:33:42 +01:00
Maciej Plewka
d58b9840b8 Fix surfaceState for multisample images
Change-Id: I2d4b17e162f61892ca1a86c241a722ef0c51ee42
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-02-05 12:44:57 +01:00
Filip Hazubski
d30cc221df Update disabling caching for a resource
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-01 10:50:21 +01:00
Dunajski, Bartosz
32ecd91401 Add parameters to HardwareContext read call
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-01 10:22:15 +01:00
Chodor, Jaroslaw
7d04159f76 Refactor around cache flush
Change-Id: Iff32af0111375f4ffc804c82e6d753d57fe94e80
2019-01-31 22:19:06 +01:00
Jobczyk, Lukasz
c1cb1f9be6 Add profiling calculation from timestamp packets
Change-Id: Ie7f8c703ca5ea5eb1f5207871ef94cbc7ece18b7
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-01-31 13:32:52 +01:00
Dunajski, Bartosz
783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-31 10:30:05 +01:00
Mateusz Jablonski
c04ba163a0 Simplify selecting heap in Wddm::mapGpuVirtualAddressImpl method
Change-Id: Id6eb5b0df1c705b5fadde62d20513fe15edf1e27
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-30 16:38:46 +01:00
Mateusz Jablonski
f157943610 Allocate internal allocations through preferred pool
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-30 11:18:15 +01:00
Venevtsev, Igor
303014582a Extend semaphore synchronization for different command stream receivers.
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
2019-01-30 09:33:41 +01:00
Mateusz Jablonski
8056d7c5f0 Cleanup headers included in wddm.h
Change-Id: Ibb9b84b8f1ea2c69ddd134451b06f0e505c841b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-29 12:43:29 +01:00
Milczarek, Slawomir
b11e0825c9 AUB capture with support for allocation dumps
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
2019-01-28 21:20:08 +01:00
Dunajski, Bartosz
c878590162 Remove EngineInstance parameter from pollForCompletion call
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-28 16:49:25 +01:00
Pawel Wilma
d56daf1726 Pass devicesBitField to gmm
Change-Id: Icad8a95d37d487fb7d01410c606baad67f681651
2019-01-28 14:51:09 +01:00
Mateusz Jablonski
b94917659a Use mem obj offset when returning cpu ptr for read write
Change-Id: Ia624559f94e6af0ed602687814e3c11f6693f8a6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-25 14:52:15 +01:00
Mateusz Jablonski
128bf4552f Remove debug flag ForceResourceLockOnTransferCalls
Unlock locked resoures in freeGraphicsMemory method

Change-Id: I2baae7b7f9d8260f19a4b083849c5bf0d1a764f3
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2019-01-25 14:03:29 +01:00