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854 Commits

Author SHA1 Message Date
Compute-Runtime-Validation
bafb847c73 Revert "fix: use condition variables instead of busy waits in worker threads" 
This reverts commit 9d1da44e08.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-10-06 20:38:46 +02:00
Radoslaw Jablonski
54de14a9dc refactor: apply clang-format's InsertBraces rule 
Formats code before InsertBraces rule is enabled.

Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-10-06 15:32:46 +02:00
Igor Venevtsev
9d1da44e08 fix: use condition variables instead of busy waits in worker threads 
Resolves: NEO-16085, GSD-11678, HSD-14025819208

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2025-10-06 13:27:34 +02:00
Compute-Runtime-Validation
d3ac2f871b Revert "fix: add missing lock in bcs split path" 
This reverts commit 8ea8e78471.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-10-06 11:38:28 +02:00
Kamil Kopryk
f17ac35108 refactor: improve compilation time 
Limit bitset includes,
stl bitset is slow to compile

Related-To: NEO-15390

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-10-03 21:21:25 +02:00
Bartosz Dunajski
8ea8e78471 fix: add missing lock in bcs split path 
Related-To: NEO-14557

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2025-10-03 21:06:28 +02:00
Jack Myers
7b18a66710 fix: ensure proper heap alignment 
Noticed an issue on machine with following `sycl-ls`:

When running `sycl-ls` with a recent debug build of NEO, it exposed a
heap alignment problem:

```shell
Assert was called at 324 line in file:
../../src/neo/shared/source/memory_manager/gfx_partition.cpp
```

Related-To: NEO-16287
Signed-off-by: Jack Myers <jack.myers@intel.com>
 2025-10-01 14:46:52 +02:00
Kamil Kopryk
2192e0b90e refactor: improve compilation time 
Limit chrono includes,
chrono is very slow to compile

Related-To: NEO-15390
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-10-01 13:50:29 +02:00
Szymon Morek
d429f0d8a0 fix: respect uncacheable flag for USM host allocations 
Related-To: NEO-14360

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-09-25 16:31:19 +02:00
Dominik Dabek
f54e3fda41 feature: adapt usm pool manager 
Change behavior to continue allocating usm pools as needed.
Intended to replace singular usm pools.

Related-To: NEO-16084

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-09-24 15:16:10 +02:00
Fabian Zwoliński
a1c5fa1a13 feature: add pooling of USM global/constant surface 
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2025-09-23 18:24:18 +02:00
Compute-Runtime-Validation
6736378c4d Revert "fix: use condition variables instead of busy waits in worker threads" 
This reverts commit 452475a0b9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-09-23 17:06:18 +02:00
Chandio, Bibrak Qamar
cf21cbc910 feature: Complete madvise for System Allocator 
Related-To: NEO-13715

Provides implmentation of getAtomicAccessAttribute using system
allocator.
Completes the implementation of the madvise feature using the
new IOCTLs in xe_drm header.

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-09-23 16:00:35 +02:00
Szymon Morek
797807bea8 fix: reduce USM pool size for platforms prior Xe2 
Related-To: NEO-16192

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-09-23 15:06:54 +02:00
Igor Venevtsev
452475a0b9 fix: use condition variables instead of busy waits in worker threads 
Resolves: NEO-16085, GSD-11678, HSD-14025819208

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2025-09-23 14:44:39 +02:00
Kamil Kopryk
5f59b4ca08 feature: add host function allocation 
Related-To: NEO-14577
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-09-23 11:10:45 +02:00
Compute-Runtime-Validation
16a6c3ca8a Revert "feature: add host function allocation" 
This reverts commit 75b4de70cd.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-09-23 02:33:15 +02:00
Kamil Kopryk
75b4de70cd feature: add host function allocation 
Related-To: NEO-14577
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-09-22 17:55:36 +02:00
Jaroslaw Warchulski
195bf66a49 refactor: fix typos 
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
 2025-09-22 12:46:41 +02:00
Szymon Morek
5d7250ae6f fix: return false for allocInUse when gpu hang detected 
Related-To: NEO-16105

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-09-16 14:11:31 +02:00
Szymon Morek
6b37243bfa performance: increase USM pool sizes 
Related-To: NEO-16045

Also, unify pool config parameters and
reduce pool size for ULTs.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-09-16 12:10:25 +02:00
Neil R. Spruit
c33fb25143 feature: Added L0 Mem Free Callback Registration 
Related-To: NEO-15719

Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
 2025-09-16 10:52:28 +02:00
Compute-Runtime-Validation
e2d12e1742 Revert "feature: add pooling of USM global/constant surface" 
This reverts commit 68698c9a74.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-09-14 16:26:29 +02:00
Fabian Zwoliński
68698c9a74 feature: add pooling of USM global/constant surface 
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2025-09-12 16:05:52 +02:00
Kamil Kopryk
f15c42bd11 performance: optimize checking if ga is imported 1/2 
Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-09-04 11:08:22 +02:00
Mateusz Hoppe
c96348d1f3 feature: add support for external memmap system extension 
Related-To: GSD-11423

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2025-09-02 13:52:42 +02:00
Michal Mrozek
6ef0af7e22 refactor: remove redundant code 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2025-08-25 16:14:42 +02:00
Mateusz Jablonski
fd610f7a7b fix: unify initial cpu range reservation size in case of 57bit CPU address range 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-08-20 09:55:11 +02:00
Compute-Runtime-Validation
17c58c1be4 Revert "refactor: reduce the size of graphics allocation" 
This reverts commit 167ca6e50c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-19 10:11:15 +02:00
Neil R. Spruit
43ebc17e17 feature: Support for opaque IPC handles on Windows and Linux 
- Added support for creating and managing opaque IPC NT handles in the
WDDM layer.
- Introduced a new flag `shareableWithoutNTHandle` to indicate if memory
can be shared without an NT handle.
- Updated the `isShareableMemory` method to accommodate this new flag.
- Added debug variable EnableShareableWithoutNTHandle to control the
behavior of sharing memory without NT handles until requested.
- Updated Linux path to enable sharing DMA Buf FDs between processes
for use in pidfd_getfd
- Updated getfd and get IPC Handle helper functions to support opaque or
previous versions

Related-To: NEO-15345 , NEO-15346 , NEO-15347, NEO-10380

Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
 2025-08-18 16:23:44 +02:00
Maciej Bielski
c6398e5d20 fix: acquire lock before checking for totalSize limit 
Related-To: NEO-15630

Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2025-08-18 15:26:06 +02:00
Mateusz Jablonski
3116ebd051 fix: respect num devices when reserving cpu address range for non-svm heaps 
in case of reserving in upper 48 bit address space

Related-To: NEO-15843, GSD-11464
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-08-18 15:12:10 +02:00
Mateusz Jablonski
a650e08145 refactor: rename variable related to reserved cpu address range 
in case of CPU address range wider than GPU address range, we reserve
CPU address range to avoid CPU side allocations in our non-SVM heaps

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-08-18 12:20:25 +02:00
Dominik Dabek
2cd11d154b fix: disable usm reuse on kmdless 
Related-To: NEO-15663

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-08-18 11:40:59 +02:00
Compute-Runtime-Validation
0855219087 Revert "feature: Support for opaque IPC handles on Windows and Linux" 
This reverts commit 46b1b2783b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-15 02:22:02 +02:00
Neil R. Spruit
46b1b2783b feature: Support for opaque IPC handles on Windows and Linux 
- Added support for creating and managing opaque IPC NT handles in the
WDDM layer.
- Introduced a new flag `shareableWithoutNTHandle` to indicate if memory
can be shared without an NT handle.
- Updated the `isShareableMemory` method to accommodate this new flag.
- Added debug variable EnableShareableWithoutNTHandle to control the
behavior of sharing memory without NT handles until requested.
- Updated Linux path to enable sharing DMA Buf FDs between processes
for use in pidfd_getfd

Related-To: NEO-15345 , NEO-15346 , NEO-15347, NEO-10380

Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
 2025-08-14 08:33:56 +02:00
Michal Mrozek
167ca6e50c refactor: reduce the size of graphics allocation 
- 32 context is way too much, most our devices has 5 context right now

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2025-08-13 11:43:27 +02:00
Maciej Bielski
478c7ce9a8 fix: possible race-condition in SvmAllocationCache::insert 
Related-To: NEO-15630

Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2025-08-13 11:18:22 +02:00
Chandio, Bibrak Qamar
6acfcb83b9 Revert "Two commits related to pStart feature" 
Related-To: NEO-15156, GSD-9939

Revert "test: fix minor errors"

This reverts commit 712dc8221e.

Revert "feature: Support for pStart"

This reverts commit 47caeda487.

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-08-13 07:10:40 +02:00
Chandio, Bibrak Qamar
47caeda487 feature: Support for pStart 
Related-To: NEO-15156, GSD-9939

Support for start address hint in zeVirtualMemReserve.

If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-08-06 12:40:29 +02:00
Compute-Runtime-Validation
c9456cda14 Revert "feature: Support for pStart" 
This reverts commit a50c0dbecf.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-06 02:26:13 +02:00
Chandio, Bibrak Qamar
a50c0dbecf feature: Support for pStart 
Related-To: NEO-15156, GSD-9939

Support for start address hint in zeVirtualMemReserve.

If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-08-05 10:14:01 +02:00
Lukasz Jobczyk
3e2acefac1 fix: Do not align svm gpu greater than its svm cpu 
Resolves: HSD-18042781233

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-05 07:52:18 +02:00
Michal Mrozek
3eefd8a4ad refactor: add type for mutex and lock 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2025-08-04 13:51:35 +02:00
Eric Mortensen
69f2cda2fa fix: add error checks & return to unMapVirtualMem 
Related-To: NEO-8566

Signed-off-by: Eric Mortensen <eric.mortensen@intel.com>
 2025-07-17 23:53:19 +02:00
Compute-Runtime-Validation
377b99e741 Revert "fix: do not align to 64kb when requested alignment is bigger" 
This reverts commit 33749b8b5a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-07-15 14:58:49 +02:00
Maciej Plewka
33749b8b5a fix: do not align to 64kb when requested alignment is bigger 
Related-To: NEO-14082
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-07-11 19:59:28 +02:00
Dominik Dabek
ff662b3e88 fix: usm reuse aub/tbx indirect access 
When allocation is saved for reuse, remove it from allocations map.
On get from reuse, reinsert it with new allocId.

Allocations saved for reuse should not be made resident for indirect
access.

Only applicable on aub/tbx csr types.

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-07-10 08:02:03 +02:00
Dominik Dabek
3dcfef5812 fix: usm reuse aub/tbx update alloc id 
On getting from reuse update alloc id and increment allocations counter.
This is to ensure that making indirect allocations resident picks up the
reuse allocation.
Only applicable on aub/tbx csr types.

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-07-07 15:49:16 +02:00
Slawomir Milczarek
76090f041d fix: Fixed out-of-bounds write to usageInfos array with residency task count 
Related-To: NEO-12952

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2025-07-03 18:00:37 +02:00