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175 Commits

Author SHA1 Message Date
Koska, Andrzej
1bff5a7bcb Dynamically expose VME extensions 
Change-Id: Ia562361aeea70020cd99f813ea325fa88ca37006
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Related-To: NEO-3416
 2019-07-24 16:07:13 +02:00
Zdunowski, Piotr
1460713d69 Fail build program if local mem size is higher then device capabilities. 
Resolves: NEO-3411

Change-Id: I04e0b97bfeb9e66e4ea730a15e0c6bfd764cab62
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-07-22 17:48:23 +02:00
Mateusz Jablonski
1114361994 Add API for querying number of slices 
Related-To: NEO-3426

Change-Id: I2893be858de9f0f6516ca6ded61123c2c15f1494
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-07-17 14:07:30 +02:00
Dunajski, Bartosz
23e9e9e02e Register Blit CSR to CommandQueue 
Change-Id: Ib22ef934492b702990ca549bab576993b0684e98
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-07-17 08:04:03 +02:00
Cencelewska
e4e5b5ccdf Add check for vme support 
Change-Id: Ic51e87e1e049bce4ce8ce111e35b94d3806db21b
Signed-off-by: Cencelewska <katarzyna.cencelewska@intel.com>
 2019-07-16 14:35:32 +02:00
Mrozek, Michal
5dc20f50d1 Change max mem alloc size deduction. 
- make it half of global mem
- change buffer input validation, look for hw limitations instead of
computed value of max mem alloc size.

Change-Id: Ibbe7eb16d01299b02cef3b1e7234efefbced2197
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-07-16 13:47:21 +02:00
Kamil Kopryk
27b3c1fe7b clGetDeviceInfo support unified shared memory 2/n. 
Change-Id: I4f01ceb8d833393a9436ecd23f085f3dced91f27
Related-To: NEO-3344
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2019-07-15 18:24:46 +02:00
Mrozek, Michal
6abb6523c2 Make max mem alloc size equal to global mem size. 
Change-Id: Ia2b2ec9d66e0b9d7ee33d8e194a42c71fc01fc97
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-07-11 16:10:53 +02:00
Venevtsev, Igor
4403796f58 Use GfxPartition for GPU address range allocations 
[4/n] - Remove allocator32Bit

Related-To: NEO-2877

Change-Id: I0772a7fe1fda19daa12699c546587bd3cdd84f2c
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-07-08 12:09:07 +02:00
Piotr Maciejewski
d1d794c658 Metrics Library Performance Counters implementation. 
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Change-Id: I0f00dca1892f4857baaebc75ba2208a4f33db1bf
 2019-07-04 15:56:47 +02:00
Daria Hinz
42b87654eb Add preemption allocation for each of the Csr 
Change-Id: Id14fbfbf6e9a6a85f035e75b4a20ca198c0996e5
Signed-off-by: Hinz <daria.hinz@intel.com>
 2019-07-03 08:17:38 +02:00
Mateusz Jablonski
910617c329 Add supportsImage flag to capability table 
Resolves: NEO-3177

Change-Id: I7b21163187b570ea08cefe37572a3838072cb7bd
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-07-02 07:51:02 +02:00
Kamil Kopryk
0a59476cb9 clGetDeviceInfo support unified memory 1/n 
Change-Id: Iebb7f9f81ebfef8382ef12783356127f27ea3fc3
Related-To: NEO-3344
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2019-06-27 11:19:51 +02:00
Venevtsev, Igor
165d1e4e55 Use GfxPartition for GPU address range allocations 
[2/n] - OsAgnosticMemoryManager

Related-To: NEO-2877

Change-Id: I887126362381ac960608a2150fae211631d3cd5b
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-06-25 12:54:20 +02:00
Jobczyk, Lukasz
329d940285 Add multiStorageResource flag to AllocationProperties 
Related-To: NEO-3242

Change-Id: If31adaead389acd3bef6af1931b91396c43b305e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-06-14 06:59:28 +02:00
Zbigniew Zdanowicz
137ab6c130 Calculate max threads for preamble only once 
Change-Id: I345f1229ae8421d97fe7c947af54f459632ae792
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-05-30 15:23:17 +02:00
Dunajski, Bartosz
ab8e3e472f Remove redundant cpuCopyAllowed flag 
Change-Id: I8609af0c64d408b87a54d9ac082de7dd0cc83a79
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-30 13:15:23 +02:00
Mateusz Jablonski
b8fb5e683b Move basic_math.h and vec.h to core directory 
Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-05-14 21:32:55 +02:00
Dunajski, Bartosz
0f87e9aa1a Rename HardwareInfo members 
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 09:13:55 +02:00
Dunajski, Bartosz
bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n] 
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 16:11:01 +02:00
Mrozek, Michal
bc35cd250a Do not use max power saving mode in VA sharing scenarios. 
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-05-07 15:23:13 +02:00
Adam Cetnerowski
79e22a09b9 Report SPIRV 1.2 as supported 
Change-Id: I3ce078f166d5257ee4e06281b6f42c1091e05b91
Signed-off-by: Adam Cetnerowski <adam.cetnerowski@intel.com>
 2019-04-23 09:58:24 +02:00
Mateusz Jablonski
1d42fe169a Add allocation types for MCS, preemption and shared context image 
Related-To: NEO-2733

Change-Id: I3e3e4ea6d4fe084c8c32c0e24c537c9131ce1e60
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-17 14:41:01 +02:00
Maciej Dziuban
b51b4a173b Pass hwInfo to getExtraDeviceInfo 
Resolves: NEO-3106
Change-Id: I8d74ac536f4325b35536f3895015a571eecafc3a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-17 11:48:20 +02:00
Mrozek, Michal
78e50cae56 Add registry key to always select engine 0. 
Change-Id: Ia2bb3307dfd69be32a77217b54bedf7178610db0
Resolves: NEO-3089
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-09 18:51:56 +02:00
Piotr Fusik
d4a0c4852b Move EngineType to aub_stream. 
Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 10:06:29 +01:00
Maciej Plewka
9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Zdunowski, Piotr
14824f1dff Add support for device specific extensions. 
Change-Id: I3ffd125875067b00bc225556c09fbe2d02f11022
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-03-25 16:02:11 +01:00
Jobczyk, Lukasz
9ecb3193af Reverse logic of creating Memory Manager - part 3 
-Move a Device::getEnabled64kbPages method's logic
 to the Memory Manager constructor

Change-Id: Ide88898000e5817a79f9a6ad5dfc9d680bec0533
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-25 14:42:16 +01:00
Piotr Fusik
cc13045ddd Move definitions out of engine_node.h. 
Change-Id: I18692a444663c11103f8991415b38000c633f24a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-25 13:22:55 +01:00
Dunajski, Bartosz
a8db48dbca Refactor Device::getEngine to get Engine by its type 
Change-Id: I640b32c0d226686e6648d39dd62404f5d507c98f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-25 10:49:37 +01:00
Stefanowski, Adam
16aee8cc46 [2/n] Move Hardware Info to Execution Environment 
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-22 10:08:26 +01:00
Piotr Fusik
db9afd06cd Remove EngineInstanceT. 
Change-Id: I08543b5f4ef5e91e6beb8390d448e53702cd9dac
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-20 10:56:22 +01:00
Adam Cetnerowski
cacab6b1bc Expose cl_khr_spirv_no_integer_wrap_decoration extension 
Change-Id: If64a6e86386064ec659b1870dd7fe0c4b00333e9
Signed-off-by: Adam Cetnerowski <adam.cetnerowski@intel.com>
 2019-03-19 15:33:23 +01:00
Dunajski, Bartosz
a25cca2099 Move Device helpers to namespace 
Change-Id: Id7aa7b7e490c5ae87a517b3e0be16292a7de9a93
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-19 15:01:34 +01:00
Piotr Fusik
429487fad0 Add constructor parameter to select low priority context. 
Change-Id: Ieb3fa008a2f1b54052e393516038c88f00944fa0
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-18 15:09:59 +01:00
Piotr Fusik
25e6494443 Use std::bitset for deviceBitfield. 
Change-Id: I9078ffbb38967b753980cb1c5ebcab00f5292598
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-14 08:36:01 +01:00
Stefanowski, Adam
341fcfc091 [1/n] Move Hardware Info to Execution Environment 
- remove gmm_environment_fixture
- remove hwInfo parameter from ExecutionEnvironment methods

Change-Id: Ieb0f9b5b89191fbbaf7676685c77644d42d69c26
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-12 08:39:26 +01:00
Jobczyk, Lukasz
4386d10e40 Reverse logic of creating Memory Manager - part 2 
-remove MM initialization from Device::CreateEngines method

Change-Id: Iaee268b002cb0f0a4edd07907c12da6dd6076b3a
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-08 14:52:55 +01:00
Jobczyk, Lukasz
878fd43a1a Reverse logic of creating Memory Manager - part 1 
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-08 09:47:29 +01:00
Dunajski, Bartosz
f24b428cf7 Improve HardwareContextController creation 
Change-Id: Iba929a2b4fcd993b38dd674be578aad0a481e8de
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-06 12:31:20 +01:00
Filip Hazubski
8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Dunajski, Bartosz
64fbfb21bf Improve iterating over existing CommandStreamReceivers 
Change-Id: I12a10852d43c625ec5521ae91918fcb12e1a6aec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-19 11:48:56 +01:00
Dunajski, Bartosz
958d931cd9 Allow to create HardwareContextController for multiple Devices 
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-14 16:00:00 +01:00
Zdanowicz, Zbigniew
8e1e874a76 Refactor headers and reorder include order 
Change-Id: I6b341e2b37e569af7d741bfd7a63804c0b25a4c9
 2019-02-14 13:39:01 +01:00
Piotr Fusik
f014f27370 Support the EnableLocalMemory debug variable in CSR. 
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
 2019-02-12 13:09:23 +01:00
Dunajski, Bartosz
dc181defba Use GpuAddress for TimestampPacket programming 
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:31:17 +01:00
Dunajski, Bartosz
30c57fd507 Simplify Device creation 
Change-Id: Iac07194db73d7f0a6914bc3550c6cba67135c24c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-07 10:41:00 +01:00
Wilma, Pawel
3a11da8ec8 Reduce max planar YUV height to 16352 rows 
The UV plane placement granularity has been changed to full tile (32 rows).
Because UV plane offset size in Surface State is 14 bits, the maximal height
has to be reduced from 16380 to 16352 to allow maximal offset to fit into
14 bits.

Change-Id: I2b21719d8d63a7f075150eef492ee44bd4dfe294
Signed-off-by: Wilma, Pawel <pawel.wilma@intel.com>
 2019-01-17 13:02:46 +01:00
Mateusz Jablonski
06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00