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39 lines
1.9 KiB
C
39 lines
1.9 KiB
C
/*
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include "../execution_model/device_enqueue.h"
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// Uncomment this macro to build "empty" schedulers
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//#define WA_DISABLE_SCHEDULERS 1
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#define OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G10 (15 * sizeof(uint))
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#define OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G10 (6 * sizeof(uint))
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#define OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G10_DWORD_OFFSET (6)
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#define OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G10_DWORD_OFFSET (15)
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#define CS_PREFETCH_SIZE_G10_WA 100
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#define SECOND_LEVEL_BUFFER_SPACE_FOR_EACH_ENQUEUE_GEN10 (OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_SIZEOF_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DEVICE_CMD + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G10 + OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G10 + OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G10 + CS_PREFETCH_SIZE + CS_PREFETCH_SIZE_G10_WA)
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#define SECOND_LEVEL_BUFFER_NUMBER_OF_ENQUEUES_GEN10 (128)
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