mirror of
https://github.com/intel/compute-runtime.git
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141 lines
5.4 KiB
C++
141 lines
5.4 KiB
C++
/*
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* Copyright (c) 2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "runtime/command_stream/thread_arbitration_policy.h"
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#include "runtime/command_stream/preemption.h"
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#include "runtime/gen9/reg_configs.h"
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#include "runtime/helpers/preamble.h"
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#include "unit_tests/preamble/preamble_fixture.h"
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#include "unit_tests/gen_common/gen_cmd_parse.h"
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using namespace OCLRT;
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typedef PreambleFixture SklSlm;
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SKLTEST_F(SklSlm, shouldBeEnabledOnGen9) {
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typedef SKLFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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uint32_t l3Config = PreambleHelper<FamilyType>::getL3Config(**platformDevices, true);
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PreambleHelper<SKLFamily>::programL3(&cs, l3Config);
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parseCommands<SKLFamily>(cs);
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auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorLRI);
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const auto &lri = *reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
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auto RegisterOffset = L3CNTLRegisterOffset<FamilyType>::registerOffset;
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EXPECT_EQ(RegisterOffset, lri.getRegisterOffset());
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EXPECT_EQ(1u, lri.getDataDword() & 1);
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}
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typedef PreambleFixture Gen9L3Config;
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SKLTEST_F(Gen9L3Config, checkNoSLM) {
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bool slmUsed = false;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_SKYLAKE>(slmUsed);
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EXPECT_EQ(0x80000140u, l3Config);
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l3Config = getL3ConfigHelper<IGFX_BROXTON>(slmUsed);
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EXPECT_EQ(0x80000140u, l3Config);
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}
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SKLTEST_F(Gen9L3Config, checkSLM) {
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bool slmUsed = true;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_SKYLAKE>(slmUsed);
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EXPECT_EQ(0x60000121u, l3Config);
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l3Config = getL3ConfigHelper<IGFX_BROXTON>(slmUsed);
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EXPECT_EQ(0x60000121u, l3Config);
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}
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typedef PreambleFixture ThreadArbitration;
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SKLTEST_F(ThreadArbitration, givenPreambleWhenItIsProgrammedThenThreadArbitrationIsSetToRoundRobin) {
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typedef SKLFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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typedef SKLFamily::PIPE_CONTROL PIPE_CONTROL;
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LinearStream &cs = linearStream;
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uint32_t l3Config = PreambleHelper<FamilyType>::getL3Config(**platformDevices, true);
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PreambleHelper<SKLFamily>::programPreamble(&linearStream, MockDevice(**platformDevices), l3Config,
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ThreadArbitrationPolicy::RoundRobin,
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nullptr);
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parseCommands<SKLFamily>(cs);
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auto ppC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(ppC, cmdList.end());
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auto itorLRI = reverse_find<MI_LOAD_REGISTER_IMM *>(cmdList.rbegin(), cmdList.rend());
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ASSERT_NE(cmdList.rend(), itorLRI);
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const auto &lri = *reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
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EXPECT_EQ(0xE404u, lri.getRegisterOffset());
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EXPECT_EQ(0x100u, lri.getDataDword());
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EXPECT_EQ(sizeof(MI_LOAD_REGISTER_IMM) + sizeof(PIPE_CONTROL),
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PreambleHelper<SKLFamily>::getAdditionalCommandsSize(MockDevice(*platformDevices[0])));
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}
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SKLTEST_F(ThreadArbitration, defaultArbitrationPolicy) {
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EXPECT_EQ(ThreadArbitrationPolicy::RoundRobin, PreambleHelper<SKLFamily>::getDefaultThreadArbitrationPolicy());
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}
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GEN9TEST_F(PreambleVfeState, WaOff) {
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typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
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testWaTable.waSendMIFLUSHBeforeVFE = 0;
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LinearStream &cs = linearStream;
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PreambleHelper<FamilyType>::programVFEState(&linearStream, **platformDevices, 0, 0);
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parseCommands<FamilyType>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_FALSE(pc.getRenderTargetCacheFlushEnable());
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EXPECT_FALSE(pc.getDepthCacheFlushEnable());
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EXPECT_FALSE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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GEN9TEST_F(PreambleVfeState, WaOn) {
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typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
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testWaTable.waSendMIFLUSHBeforeVFE = 1;
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LinearStream &cs = linearStream;
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PreambleHelper<FamilyType>::programVFEState(&linearStream, **platformDevices, 0, 0);
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parseCommands<FamilyType>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_TRUE(pc.getRenderTargetCacheFlushEnable());
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EXPECT_TRUE(pc.getDepthCacheFlushEnable());
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EXPECT_TRUE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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