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29b87958d2b4d4a41aebba7e087a8ed20f6021e4
compute-runtime/level_zero
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Mateusz Jablonski a551807480 refactor: merge memory properties into single header
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-12-15 16:34:33 +01:00
..
api
feature: add R&R support for host functions 1/n
2025-12-15 13:49:31 +01:00
cmake
build: remove logic of excluding platforms without L0 support
2025-02-04 21:01:18 +01:00
core
refactor: merge memory properties into single header
2025-12-15 16:34:33 +01:00
ddi
feature: add support for L0 v1.14 API
2025-10-27 12:34:58 +01:00
doc
feature(sysman): Introduce new Driver Exp APIs for Sysman RAS
2025-12-09 19:59:45 +01:00
experimental
feature: add R&R support for host functions 1/n
2025-12-15 13:49:31 +01:00
include
feature: Add extension name and exposure to new the RAS Driver Exp APIs
2025-12-15 10:12:55 +01:00
sysman
feature: Add initial support for CRI
2025-12-15 12:12:42 +01:00
tools
feature: Add support for barrier memory access
2025-12-12 18:25:54 +01:00
.config
ci: add initial configs
2023-12-12 16:00:46 +01:00
CMakeLists.txt
refactor: use precompiled headers on Windows
2025-12-08 10:12:32 +01:00
os_release_info.cmake
build: unify minimum required cmake version
2024-05-21 13:10:17 +02:00
ze_intel_gpu_lib_pch.h
refactor: use precompiled headers on Windows
2025-12-08 10:12:32 +01:00
ze_intel_gpu_version.h.in
…
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