mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-03 06:49:52 +08:00
c135bd4c42
This commit enables AUB dumps in scenarios with images with no host ptr when resource lock is required to get CPU address and dump image contents. Change-Id: I996efc5f520d0ac7b470870f7b4eeb9d2ef7b25b
478 lines
19 KiB
C++
478 lines
19 KiB
C++
/*
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* Copyright (c) 2017 -2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "hw_cmds.h"
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#include "runtime/helpers/aligned_memory.h"
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#include "runtime/helpers/debug_helpers.h"
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#include "runtime/helpers/ptr_math.h"
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#include "runtime/memory_manager/graphics_allocation.h"
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#include "runtime/memory_manager/os_agnostic_memory_manager.h"
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#include <cstring>
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namespace OCLRT {
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template <typename GfxFamily>
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AUBCommandStreamReceiverHw<GfxFamily>::AUBCommandStreamReceiverHw(const HardwareInfo &hwInfoIn, bool standalone)
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: BaseClass(hwInfoIn),
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standalone(standalone) {
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this->dispatchMode = CommandStreamReceiver::DispatchMode::BatchedDispatch;
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if (DebugManager.flags.CsrDispatchMode.get()) {
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this->dispatchMode = (CommandStreamReceiver::DispatchMode)DebugManager.flags.CsrDispatchMode.get();
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}
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for (auto &engineInfo : engineInfoTable) {
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engineInfo.pLRCA = nullptr;
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engineInfo.ggttLRCA = 0u;
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engineInfo.pGlobalHWStatusPage = nullptr;
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engineInfo.ggttHWSP = 0u;
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engineInfo.pRingBuffer = nullptr;
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engineInfo.ggttRingBuffer = 0u;
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engineInfo.sizeRingBuffer = 0;
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engineInfo.tailRingBuffer = 0;
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}
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}
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template <typename GfxFamily>
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AUBCommandStreamReceiverHw<GfxFamily>::~AUBCommandStreamReceiverHw() {
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stream.close();
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for (auto &engineInfo : engineInfoTable) {
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alignedFree(engineInfo.pLRCA);
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gttRemap.unmap(engineInfo.pLRCA);
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engineInfo.pLRCA = nullptr;
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alignedFree(engineInfo.pGlobalHWStatusPage);
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gttRemap.unmap(engineInfo.pGlobalHWStatusPage);
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engineInfo.pGlobalHWStatusPage = nullptr;
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alignedFree(engineInfo.pRingBuffer);
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gttRemap.unmap(engineInfo.pRingBuffer);
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engineInfo.pRingBuffer = nullptr;
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}
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}
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template <typename GfxFamily>
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const AubMemDump::LrcaHelper &AUBCommandStreamReceiverHw<GfxFamily>::getCsTraits(EngineType engineType) {
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return *AUBFamilyMapper<GfxFamily>::csTraits[engineType];
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::initGlobalMMIO() {
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for (auto &mmioPair : AUBFamilyMapper<GfxFamily>::globalMMIO) {
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stream.writeMMIO(mmioPair.first, mmioPair.second);
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}
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::initEngineMMIO(EngineType engineType) {
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auto mmioList = AUBFamilyMapper<GfxFamily>::perEngineMMIO[engineType];
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DEBUG_BREAK_IF(!mmioList);
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for (auto &mmioPair : *mmioList) {
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stream.writeMMIO(mmioPair.first, mmioPair.second);
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}
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::initializeEngine(EngineType engineType) {
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auto mmioBase = getCsTraits(engineType).mmioBase;
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auto &engineInfo = engineInfoTable[engineType];
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initGlobalMMIO();
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initEngineMMIO(engineType);
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// Global HW Status Page
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{
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const size_t sizeHWSP = 0x1000;
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const size_t alignHWSP = 0x1000;
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engineInfo.pGlobalHWStatusPage = alignedMalloc(sizeHWSP, alignHWSP);
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engineInfo.ggttHWSP = gttRemap.map(engineInfo.pGlobalHWStatusPage, sizeHWSP);
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auto physHWSP = ggtt.map(engineInfo.ggttHWSP, sizeHWSP);
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// Write our GHWSP
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{
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std::ostringstream str;
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str << "ggtt: " << std::hex << std::showbase << engineInfo.ggttHWSP;
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stream.addComment(str.str().c_str());
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}
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AUB::reserveAddressGGTT(stream, engineInfo.ggttHWSP, sizeHWSP, physHWSP);
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stream.writeMMIO(mmioBase + 0x2080, engineInfo.ggttHWSP);
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}
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// Allocate the LRCA
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auto csTraits = getCsTraits(engineType);
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const size_t sizeLRCA = csTraits.sizeLRCA;
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const size_t alignLRCA = csTraits.alignLRCA;
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auto pLRCABase = alignedMalloc(sizeLRCA, alignLRCA);
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engineInfo.pLRCA = pLRCABase;
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// Initialize the LRCA to a known state
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csTraits.initialize(pLRCABase);
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// Reserve the ring buffer
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engineInfo.sizeRingBuffer = 0x4 * 0x1000;
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{
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const size_t alignRingBuffer = 0x1000;
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engineInfo.pRingBuffer = alignedMalloc(engineInfo.sizeRingBuffer, alignRingBuffer);
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engineInfo.ggttRingBuffer = gttRemap.map(engineInfo.pRingBuffer, engineInfo.sizeRingBuffer);
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auto physRingBuffer = ggtt.map(engineInfo.ggttRingBuffer, engineInfo.sizeRingBuffer);
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{
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std::ostringstream str;
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str << "ggtt: " << std::hex << std::showbase << engineInfo.ggttRingBuffer;
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stream.addComment(str.str().c_str());
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}
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AUB::reserveAddressGGTT(stream, engineInfo.ggttRingBuffer, engineInfo.sizeRingBuffer, physRingBuffer);
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}
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// Initialize the ring MMIO registers
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{
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uint32_t ringHead = 0x000;
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uint32_t ringTail = 0x000;
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auto ringBase = engineInfo.ggttRingBuffer;
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auto ringCtrl = (uint32_t)((engineInfo.sizeRingBuffer - 0x1000) | 1);
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csTraits.setRingHead(pLRCABase, ringHead);
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csTraits.setRingTail(pLRCABase, ringTail);
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csTraits.setRingBase(pLRCABase, ringBase);
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csTraits.setRingCtrl(pLRCABase, ringCtrl);
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}
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// Write our LRCA
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{
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engineInfo.ggttLRCA = gttRemap.map(engineInfo.pLRCA, sizeLRCA);
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auto lrcAddressPhys = ggtt.map(engineInfo.ggttLRCA, sizeLRCA);
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{
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std::ostringstream str;
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str << "ggtt: " << std::hex << std::showbase << engineInfo.ggttLRCA;
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stream.addComment(str.str().c_str());
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}
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AUB::reserveAddressGGTT(stream, engineInfo.ggttLRCA, sizeLRCA, lrcAddressPhys);
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AUB::addMemoryWrite(
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stream,
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lrcAddressPhys,
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pLRCABase,
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sizeLRCA,
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AubMemDump::AddressSpaceValues::TraceNonlocal,
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csTraits.aubHintLRCA);
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}
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// Create a context to facilitate AUB dumping of memory using PPGTT
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addContextToken();
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}
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template <typename GfxFamily>
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CommandStreamReceiver *AUBCommandStreamReceiverHw<GfxFamily>::create(const HardwareInfo &hwInfoIn, const std::string &fileName, bool standalone) {
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auto csr = new AUBCommandStreamReceiverHw<GfxFamily>(hwInfoIn, standalone);
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// Open our file
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csr->stream.open(fileName.c_str());
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if (!csr->stream.fileHandle.is_open()) {
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// This DEBUG_BREAK_IF most probably means you are not executing aub tests with correct current directory (containing aub_out folder)
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// try adding <familycodename>_aub
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DEBUG_BREAK_IF(true);
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}
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// Add the file header.
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csr->stream.init(AubMemDump::SteppingValues::A, AUB::Traits::device);
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return csr;
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}
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template <typename GfxFamily>
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FlushStamp AUBCommandStreamReceiverHw<GfxFamily>::flush(BatchBuffer &batchBuffer,
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EngineType engineType, ResidencyContainer *allocationsForResidency) {
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uint32_t mmioBase = getCsTraits(engineType).mmioBase;
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auto &engineInfo = engineInfoTable[engineType];
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if (!engineInfo.pLRCA) {
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initializeEngine(engineType);
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DEBUG_BREAK_IF(!engineInfo.pLRCA);
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}
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if (this->standalone) {
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if (this->dispatchMode == CommandStreamReceiver::DispatchMode::ImmediateDispatch) {
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makeResident(*batchBuffer.commandBufferAllocation);
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} else {
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allocationsForResidency->push_back(batchBuffer.commandBufferAllocation);
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batchBuffer.commandBufferAllocation->residencyTaskCount = this->taskCount;
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}
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}
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processResidency(allocationsForResidency);
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// Write our batch buffer
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auto pBatchBuffer = ptrOffset(batchBuffer.commandBufferAllocation->getUnderlyingBuffer(), batchBuffer.startOffset);
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auto currentOffset = batchBuffer.usedSize;
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DEBUG_BREAK_IF(currentOffset < batchBuffer.startOffset);
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auto sizeBatchBuffer = currentOffset - batchBuffer.startOffset;
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{
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{
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std::ostringstream str;
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str << "ppgtt: " << std::hex << std::showbase << pBatchBuffer;
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stream.addComment(str.str().c_str());
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}
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auto physBatchBuffer = ppgtt.map(reinterpret_cast<uintptr_t>(pBatchBuffer), sizeBatchBuffer);
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AUB::reserveAddressPPGTT(stream, reinterpret_cast<uintptr_t>(pBatchBuffer), sizeBatchBuffer, physBatchBuffer);
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AUB::addMemoryWrite(
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stream,
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physBatchBuffer,
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pBatchBuffer,
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sizeBatchBuffer,
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AubMemDump::AddressSpaceValues::TraceNonlocal,
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AubMemDump::DataTypeHintValues::TraceBatchBufferPrimary);
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}
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// Add a batch buffer start to the ring buffer
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auto previousTail = engineInfo.tailRingBuffer;
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{
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typedef typename GfxFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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typedef typename GfxFamily::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START;
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typedef typename GfxFamily::MI_NOOP MI_NOOP;
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auto pTail = ptrOffset(engineInfo.pRingBuffer, engineInfo.tailRingBuffer);
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auto ggttTail = ptrOffset(engineInfo.ggttRingBuffer, engineInfo.tailRingBuffer);
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auto sizeNeeded =
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sizeof(MI_BATCH_BUFFER_START) +
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sizeof(MI_LOAD_REGISTER_IMM);
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auto tailAlignment = sizeof(uint64_t);
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sizeNeeded = alignUp(sizeNeeded, tailAlignment);
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if (engineInfo.tailRingBuffer + sizeNeeded >= engineInfo.sizeRingBuffer) {
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// Pad the remaining ring with NOOPs
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auto sizeToWrap = engineInfo.sizeRingBuffer - engineInfo.tailRingBuffer;
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memset(pTail, 0, sizeToWrap);
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// write remaining ring
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auto physDumpStart = ggtt.map(ggttTail, sizeToWrap);
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AUB::addMemoryWrite(
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stream,
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physDumpStart,
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pTail,
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sizeToWrap,
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AubMemDump::AddressSpaceValues::TraceNonlocal,
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AubMemDump::DataTypeHintValues::TraceCommandBuffer);
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previousTail = 0;
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engineInfo.tailRingBuffer = 0;
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pTail = engineInfo.pRingBuffer;
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} else if (engineInfo.tailRingBuffer == 0) {
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// Add a LRI if this is our first submission
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auto lri = MI_LOAD_REGISTER_IMM::sInit();
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lri.setRegisterOffset(mmioBase + 0x2244);
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lri.setDataDword(0x00010000);
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*(MI_LOAD_REGISTER_IMM *)pTail = lri;
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pTail = ((MI_LOAD_REGISTER_IMM *)pTail) + 1;
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}
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// Add our BBS
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auto bbs = MI_BATCH_BUFFER_START::sInit();
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bbs.setBatchBufferStartAddressGraphicsaddress472(AUB::ptrToPPGTT(pBatchBuffer));
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bbs.setAddressSpaceIndicator(MI_BATCH_BUFFER_START::ADDRESS_SPACE_INDICATOR_PPGTT);
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*(MI_BATCH_BUFFER_START *)pTail = bbs;
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pTail = ((MI_BATCH_BUFFER_START *)pTail) + 1;
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// Compute our new ring tail.
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engineInfo.tailRingBuffer = (uint32_t)ptrDiff(pTail, engineInfo.pRingBuffer);
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// Add NOOPs as needed as our tail needs to be aligned
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while (engineInfo.tailRingBuffer % tailAlignment) {
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*(MI_NOOP *)pTail = MI_NOOP::sInit();
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pTail = ((MI_NOOP *)pTail) + 1;
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engineInfo.tailRingBuffer = (uint32_t)ptrDiff(pTail, engineInfo.pRingBuffer);
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}
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UNRECOVERABLE_IF((engineInfo.tailRingBuffer % tailAlignment) != 0);
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// Only dump the new commands
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auto ggttDumpStart = ptrOffset(engineInfo.ggttRingBuffer, previousTail);
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auto dumpStart = ptrOffset(engineInfo.pRingBuffer, previousTail);
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auto dumpLength = engineInfo.tailRingBuffer - previousTail;
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// write ring
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{
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std::ostringstream str;
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str << "ggtt: " << std::hex << std::showbase << ggttDumpStart;
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stream.addComment(str.str().c_str());
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}
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auto physDumpStart = ggtt.map(ggttDumpStart, dumpLength);
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AUB::addMemoryWrite(
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stream,
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physDumpStart,
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dumpStart,
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dumpLength,
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AubMemDump::AddressSpaceValues::TraceNonlocal,
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AubMemDump::DataTypeHintValues::TraceCommandBuffer);
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// update the ring mmio tail in the LRCA
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{
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std::ostringstream str;
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str << "ggtt: " << std::hex << std::showbase << engineInfo.ggttLRCA + 0x101c;
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stream.addComment(str.str().c_str());
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}
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auto physLRCA = ggtt.map(engineInfo.ggttLRCA, sizeof(engineInfo.tailRingBuffer));
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AUB::addMemoryWrite(
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stream,
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physLRCA + 0x101c,
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&engineInfo.tailRingBuffer,
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sizeof(engineInfo.tailRingBuffer),
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AubMemDump::AddressSpaceValues::TraceNonlocal);
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DEBUG_BREAK_IF(engineInfo.tailRingBuffer >= engineInfo.sizeRingBuffer);
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}
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// Submit our execlist by submitting to the execlist submit ports
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{
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typename AUB::MiContextDescriptorReg contextDescriptor = {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}};
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contextDescriptor.sData.Valid = true;
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contextDescriptor.sData.ForcePageDirRestore = false;
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contextDescriptor.sData.ForceRestore = false;
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contextDescriptor.sData.Legacy = true;
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contextDescriptor.sData.FaultSupport = 0;
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contextDescriptor.sData.PrivilegeAccessOrPPGTT = true;
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contextDescriptor.sData.ADor64bitSupport = AUB::Traits::addressingBits > 32;
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auto ggttLRCA = engineInfo.ggttLRCA;
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contextDescriptor.sData.LogicalRingCtxAddress = ggttLRCA / 4096;
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contextDescriptor.sData.ContextID = 0;
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submitLRCA(engineType, contextDescriptor);
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}
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if (this->standalone) {
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pollForCompletion(engineType);
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}
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return 0;
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::submitLRCA(EngineType engineType, const typename AUBCommandStreamReceiverHw<GfxFamily>::MiContextDescriptorReg &contextDescriptor) {
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auto mmioBase = getCsTraits(engineType).mmioBase;
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stream.writeMMIO(mmioBase + 0x2230, 0);
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stream.writeMMIO(mmioBase + 0x2230, 0);
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stream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
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stream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::pollForCompletion(EngineType engineType) {
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typedef typename AubMemDump::CmdServicesMemTraceRegisterPoll CmdServicesMemTraceRegisterPoll;
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auto mmioBase = getCsTraits(engineType).mmioBase;
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bool pollNotEqual = false;
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this->stream.registerPoll(
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mmioBase + 0x2234, //EXECLIST_STATUS
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0x100,
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0x100,
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pollNotEqual,
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CmdServicesMemTraceRegisterPoll::TimeoutActionValues::Abort);
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}
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template <typename GfxFamily>
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void AUBCommandStreamReceiverHw<GfxFamily>::makeResident(GraphicsAllocation &gfxAllocation) {
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auto submissionTaskCount = this->taskCount + 1;
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if (gfxAllocation.residencyTaskCount < (int)submissionTaskCount) {
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this->getMemoryManager()->pushAllocationForResidency(&gfxAllocation);
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}
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gfxAllocation.residencyTaskCount = submissionTaskCount;
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}
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template <typename GfxFamily>
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bool AUBCommandStreamReceiverHw<GfxFamily>::writeMemory(GraphicsAllocation &gfxAllocation) {
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auto cpuAddress = gfxAllocation.getUnderlyingBuffer();
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auto gpuAddress = gfxAllocation.getGpuAddress();
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auto size = gfxAllocation.getUnderlyingBufferSize();
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auto allocType = gfxAllocation.getAllocationType();
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if ((size == 0) || !!(allocType & GraphicsAllocation::ALLOCATION_TYPE_NON_AUB_WRITABLE))
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return false;
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{
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std::ostringstream str;
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str << "ppgtt: " << std::hex << std::showbase << gpuAddress;
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stream.addComment(str.str().c_str());
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}
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if (cpuAddress == nullptr) {
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DEBUG_BREAK_IF(gfxAllocation.isLocked());
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cpuAddress = this->getMemoryManager()->lockResource(&gfxAllocation);
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gfxAllocation.setLocked(true);
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}
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PageWalker walker = [&](uint64_t physAddress, size_t size, size_t offset) {
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static const size_t pageSize = 4096;
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auto vmAddr = (static_cast<uintptr_t>(gpuAddress) + offset) & ~(pageSize - 1);
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auto pAddr = physAddress & ~(pageSize - 1);
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AUB::reserveAddressPPGTT(stream, vmAddr, pageSize, pAddr);
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AUB::addMemoryWrite(stream, physAddress,
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reinterpret_cast<void *>(reinterpret_cast<uintptr_t>(cpuAddress) + offset),
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size, AubMemDump::AddressSpaceValues::TraceNonlocal);
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};
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ppgtt.pageWalk(static_cast<uintptr_t>(gpuAddress), size, 0, walker);
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if (gfxAllocation.isLocked()) {
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this->getMemoryManager()->unlockResource(&gfxAllocation);
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gfxAllocation.setLocked(false);
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}
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if (!!(allocType & GraphicsAllocation::ALLOCATION_TYPE_BUFFER) ||
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!!(allocType & GraphicsAllocation::ALLOCATION_TYPE_IMAGE))
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gfxAllocation.setAllocationType(allocType | GraphicsAllocation::ALLOCATION_TYPE_NON_AUB_WRITABLE);
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|
|
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return true;
|
|
}
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|
|
|
template <typename GfxFamily>
|
|
void AUBCommandStreamReceiverHw<GfxFamily>::processResidency(ResidencyContainer *allocationsForResidency) {
|
|
auto &residencyAllocations = allocationsForResidency ? *allocationsForResidency : this->getMemoryManager()->getResidencyAllocations();
|
|
|
|
for (auto &gfxAllocation : residencyAllocations) {
|
|
if (!writeMemory(*gfxAllocation)) {
|
|
DEBUG_BREAK_IF(!((gfxAllocation->getUnderlyingBufferSize() == 0) ||
|
|
!!(gfxAllocation->getAllocationType() & GraphicsAllocation::ALLOCATION_TYPE_NON_AUB_WRITABLE)));
|
|
}
|
|
gfxAllocation->residencyTaskCount = this->taskCount + 1;
|
|
}
|
|
}
|
|
|
|
template <typename GfxFamily>
|
|
void AUBCommandStreamReceiverHw<GfxFamily>::makeNonResident(GraphicsAllocation &gfxAllocation) {
|
|
if (gfxAllocation.residencyTaskCount != ObjectNotResident) {
|
|
this->getMemoryManager()->pushAllocationForEviction(&gfxAllocation);
|
|
gfxAllocation.residencyTaskCount = ObjectNotResident;
|
|
}
|
|
}
|
|
|
|
template <typename GfxFamily>
|
|
void AUBCommandStreamReceiverHw<GfxFamily>::addContextToken() {
|
|
// Some simulator versions don't support adding the context token.
|
|
// This hook allows specialization for those that do.
|
|
}
|
|
} // namespace OCLRT
|