Szymon Morek 0db5ce22a1 performance: use resource_barrier on Xe2 and PTL ...

Related-To: NEO-14943

Signed-off-by: Szymon Morek <szymon.morek@intel.com>

2025-06-24 14:24:47 +02:00

..

adln

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

adlp

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

adls

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

dg1

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

rkl

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

tgllp

refactor: use proper include pattern

2023-09-21 13:14:25 +02:00

CMakeLists.txt

…

cmd_parse_gen12lp.cpp

performance: use resource_barrier on Xe2 and PTL

2025-06-24 14:24:47 +02:00

test_traits_gen12lp.h

test: remove not needed test trait

2025-04-15 15:20:25 +02:00

unit_test_helper_gen12lp.cpp

feature: prework to enable memory prefetch

2025-06-10 01:05:41 +02:00