mirror of
https://github.com/intel/compute-runtime.git
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71 lines
2.9 KiB
C++
71 lines
2.9 KiB
C++
/*
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* Copyright (C) 2017-2018 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "hw_info.h"
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#include "hw_cmds.h"
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#include "reg_configs_common.h"
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#include "runtime/command_stream/device_command_stream.h"
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#include "runtime/command_stream/command_stream_receiver_hw.inl"
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namespace OCLRT {
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typedef CNLFamily Family;
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static auto gfxCore = IGFX_GEN10_CORE;
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template <>
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size_t CommandStreamReceiverHw<Family>::getCmdSizeForComputeMode() {
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if (csrSizeRequestFlags.coherencyRequestChanged) {
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return sizeof(typename Family::MI_LOAD_REGISTER_IMM);
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}
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return 0;
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}
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template <>
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void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags) {
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if (csrSizeRequestFlags.coherencyRequestChanged) {
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LriHelper<Family>::program(&stream, gen10HdcModeRegisterAddresss, DwordBuilder::build(4, true, !dispatchFlags.requiresCoherency));
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this->lastSentCoherencyRequest = static_cast<int8_t>(dispatchFlags.requiresCoherency);
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}
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}
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template <>
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void CommandStreamReceiverHw<Family>::addPipeControlWA(LinearStream &commandStream, bool flushDC) {
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auto pCmd = (Family::PIPE_CONTROL *)commandStream.getSpace(sizeof(Family::PIPE_CONTROL));
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*pCmd = Family::cmdInitPipeControl;
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pCmd->setDcFlushEnable(flushDC);
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pCmd->setCommandStreamerStallEnable(true);
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}
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template <>
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int CommandStreamReceiverHw<Family>::getRequiredPipeControlSize() const {
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return 2 * sizeof(Family::PIPE_CONTROL);
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}
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template <>
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void CommandStreamReceiverHw<Family>::addDcFlushToPipeControl(Family::PIPE_CONTROL *pCmd, bool flushDC) {
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}
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template <>
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void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
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extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[2 * IGFX_MAX_CORE];
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commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
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}
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// Explicitly instantiate CommandStreamReceiverHw for this device family
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template class CommandStreamReceiverHw<Family>;
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const Family::GPGPU_WALKER Family::cmdInitGpgpuWalker = Family::GPGPU_WALKER::sInit();
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const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
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const Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD Family::cmdInitMediaInterfaceDescriptorLoad = Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
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const Family::MEDIA_STATE_FLUSH Family::cmdInitMediaStateFlush = Family::MEDIA_STATE_FLUSH::sInit();
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const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
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const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
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const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
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const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
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const Family::RENDER_SURFACE_STATE Family::cmdRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
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} // namespace OCLRT
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