mirror of
https://github.com/intel/compute-runtime.git
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45 lines
1.5 KiB
C++
45 lines
1.5 KiB
C++
/*
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* Copyright (C) 2021-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "shared/source/gen12lp/hw_cmds_base.h"
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namespace NEO {
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struct ADLP : public Gen12LpFamily {
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static const PLATFORM platform;
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static const HardwareInfo hwInfo;
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static const uint64_t defaultHardwareInfoConfig;
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static FeatureTable featureTable;
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static WorkaroundTable workaroundTable;
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static const uint32_t threadsPerEu = 7;
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static const uint32_t maxEuPerSubslice = 16;
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static const uint32_t maxSlicesSupported = 1;
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static const uint32_t maxSubslicesSupported = 6;
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static const uint32_t maxDualSubslicesSupported = 12;
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static const RuntimeCapabilityTable capabilityTable;
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static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig);
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static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo);
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static void setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
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struct PipelineSelectStateSupport {
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static constexpr bool modeSelected = true;
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static constexpr bool mediaSamplerDopClockGate = true;
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static constexpr bool systolicMode = true;
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};
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};
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class AdlpHwConfig : public ADLP {
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public:
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static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
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static const HardwareInfo hwInfo;
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private:
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static GT_SYSTEM_INFO gtSystemInfo;
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};
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#include "hw_cmds_adlp.inl"
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} // namespace NEO
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