mirror of
https://github.com/intel/compute-runtime.git
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54 lines
1.5 KiB
C++
54 lines
1.5 KiB
C++
/*
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* Copyright (C) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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template <>
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uint32_t HwInfoConfigHw<gfxProduct>::getHwRevIdFromStepping(uint32_t stepping, const HardwareInfo &hwInfo) const {
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switch (stepping) {
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case REVISION_A0:
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return 0x0;
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case REVISION_B:
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return 0x1;
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}
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return CommonConstants::invalidStepping;
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}
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template <>
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uint32_t HwInfoConfigHw<gfxProduct>::getSteppingFromHwRevId(const HardwareInfo &hwInfo) const {
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switch (hwInfo.platform.usRevId) {
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case 0x0:
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return REVISION_A0;
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case 0x1:
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return REVISION_B;
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}
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return CommonConstants::invalidStepping;
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}
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template <>
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bool HwInfoConfigHw<gfxProduct>::pipeControlWARequired(const HardwareInfo &hwInfo) const {
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return HwHelper::get(hwInfo.platform.eRenderCoreFamily).isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);
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}
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template <>
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bool HwInfoConfigHw<gfxProduct>::imagePitchAlignmentWARequired(const HardwareInfo &hwInfo) const {
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return HwHelper::get(hwInfo.platform.eRenderCoreFamily).isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);
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}
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template <>
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bool HwInfoConfigHw<gfxProduct>::isForceEmuInt32DivRemSPWARequired(const HardwareInfo &hwInfo) const {
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return HwHelper::get(hwInfo.platform.eRenderCoreFamily).isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);
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}
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template <>
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bool HwInfoConfigHw<gfxProduct>::is3DPipelineSelectWARequired() const {
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return true;
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}
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template <>
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bool HwInfoConfigHw<gfxProduct>::isStorageInfoAdjustmentRequired() const {
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return true;
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}
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