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d18d1b6ce4
Change-Id: I1685057a641d938170b8c7ec860d2f53f45b1d6d Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
23 lines
892 B
C
23 lines
892 B
C
/*
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* Copyright (C) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "../execution_model/device_enqueue.h"
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// Uncomment this macro to build "empty" schedulers
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//#define WA_DISABLE_SCHEDULERS 1
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#define OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G12LP (15 * sizeof(uint))
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#define OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G12LP (6 * sizeof(uint))
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#define OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G12LP_DWORD_OFFSET (6)
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#define OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G12LP_DWORD_OFFSET (15)
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#define SECOND_LEVEL_BUFFER_SPACE_FOR_EACH_ENQUEUE_GEN12LP (OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_SIZEOF_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DEVICE_CMD + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G12LP + OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G12LP + OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G12LP + CS_PREFETCH_SIZE)
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#define SECOND_LEVEL_BUFFER_NUMBER_OF_ENQUEUES_GEN12LP (128)
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