mirror of
https://github.com/intel/compute-runtime.git
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e4d56cde21
This change introduces detection of GPU hangs in blocking calls to enqueueHandler() function. Moreover, usages of this function template have been revised and adjusted to check the exit code. Furthermore, enqueueBlit() and dispatchBcsOrGpgpuEnqueue() functions returns value now. ULTs have been added to cover new cases. Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com> Related-To: NEO-6681
120 lines
4.5 KiB
C++
120 lines
4.5 KiB
C++
/*
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "shared/source/built_ins/built_ins.h"
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#include "shared/source/command_stream/command_stream_receiver.h"
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#include "opencl/source/command_queue/command_queue_hw.h"
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#include "opencl/source/command_queue/enqueue_common.h"
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#include "opencl/source/helpers/hardware_commands_helper.h"
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#include "opencl/source/mem_obj/buffer.h"
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#include "opencl/source/memory_manager/mem_obj_surface.h"
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#include <new>
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namespace NEO {
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template <typename GfxFamily>
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cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
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Buffer *buffer,
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cl_bool blockingRead,
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const size_t *bufferOrigin,
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const size_t *hostOrigin,
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const size_t *region,
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size_t bufferRowPitch,
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size_t bufferSlicePitch,
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size_t hostRowPitch,
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size_t hostSlicePitch,
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void *ptr,
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cl_uint numEventsInWaitList,
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const cl_event *eventWaitList,
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cl_event *event) {
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const cl_command_type cmdType = CL_COMMAND_READ_BUFFER_RECT;
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CsrSelectionArgs csrSelectionArgs{cmdType, buffer, {}, device->getRootDeviceIndex(), region};
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(csrSelectionArgs);
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auto isMemTransferNeeded = true;
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if (buffer->isMemObjZeroCopy()) {
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size_t bufferOffset;
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size_t hostOffset;
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computeOffsetsValueForRectCommands(&bufferOffset, &hostOffset, bufferOrigin, hostOrigin, region, bufferRowPitch, bufferSlicePitch, hostRowPitch, hostSlicePitch);
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isMemTransferNeeded = buffer->checkIfMemoryTransferIsRequired(bufferOffset, hostOffset, ptr, cmdType);
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}
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if (!isMemTransferNeeded) {
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return enqueueMarkerForReadWriteOperation(buffer, ptr, cmdType, blockingRead,
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numEventsInWaitList, eventWaitList, event);
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}
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const size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
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const uint32_t rootDeviceIndex = getDevice().getRootDeviceIndex();
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InternalMemoryType memoryType = InternalMemoryType::NOT_SPECIFIED;
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GraphicsAllocation *mapAllocation = nullptr;
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bool isCpuCopyAllowed = false;
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getContext().tryGetExistingHostPtrAllocation(ptr, hostPtrSize, rootDeviceIndex, mapAllocation, memoryType, isCpuCopyAllowed);
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auto eBuiltInOps = EBuiltInOps::CopyBufferRect;
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if (forceStateless(buffer->getSize())) {
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eBuiltInOps = EBuiltInOps::CopyBufferRectStateless;
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}
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void *dstPtr = ptr;
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MemObjSurface srcBufferSurf(buffer);
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HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
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GeneralSurface mapSurface;
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Surface *surfaces[] = {&srcBufferSurf, nullptr};
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if (region[0] != 0 && region[1] != 0 && region[2] != 0) {
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if (mapAllocation) {
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surfaces[1] = &mapSurface;
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mapSurface.setGraphicsAllocation(mapAllocation);
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dstPtr = convertAddressWithOffsetToGpuVa(dstPtr, memoryType, *mapAllocation);
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} else {
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surfaces[1] = &hostPtrSurf;
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bool status = csr.createAllocationForHostSurface(hostPtrSurf, true);
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if (!status) {
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return CL_OUT_OF_RESOURCES;
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}
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dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddress());
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}
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}
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void *alignedDstPtr = alignDown(dstPtr, 4);
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size_t dstPtrOffset = ptrDiff(dstPtr, alignedDstPtr);
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BuiltinOpParams dc;
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dc.srcMemObj = buffer;
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dc.dstPtr = alignedDstPtr;
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dc.srcOffset = bufferOrigin;
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dc.dstOffset = hostOrigin;
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dc.transferAllocation = hostPtrSurf.getAllocation();
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dc.dstOffset.x += dstPtrOffset;
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dc.size = region;
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dc.srcRowPitch = bufferRowPitch;
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dc.srcSlicePitch = bufferSlicePitch;
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dc.dstRowPitch = hostRowPitch;
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dc.dstSlicePitch = hostSlicePitch;
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MultiDispatchInfo dispatchInfo(dc);
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const auto dispatchResult = dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead, csr);
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if (dispatchResult != CL_SUCCESS) {
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return dispatchResult;
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}
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if (context->isProvidingPerformanceHints()) {
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context->providePerformanceHintForMemoryTransfer(CL_COMMAND_READ_BUFFER_RECT, true, static_cast<cl_mem>(buffer), ptr);
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if (!isL3Capable(ptr, hostPtrSize)) {
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context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_RECT_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, hostPtrSize, MemoryConstants::pageSize, MemoryConstants::pageSize);
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}
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}
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return CL_SUCCESS;
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}
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} // namespace NEO
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