Zbigniew Zdanowicz bf2072c3ea Add cross regular and intermediate command lists base address state transitions ...

- updates coming from regular list are updated in csr last sent variables
- all per context and per kernel transitions kept in single place
- state updates from intermediate to regular are set in csr properties
- global atomics support duplicates removed

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>

2023-02-17 16:49:47 +01:00

..

api

Cleanup includes 57

2023-02-17 11:19:59 +01:00

cmake

CMake: adjust testing flags based on TESTS_* flags

2022-10-28 10:32:22 +02:00

core

Add cross regular and intermediate command lists base address state transitions

2023-02-17 16:49:47 +01:00

ddi

Copyright header update

2021-05-17 20:38:19 +02:00

doc

Sysman: Redesign event API to effectively use uevents

2022-12-07 07:29:57 +01:00

experimental/source

Cleanup includes 57

2023-02-17 11:19:59 +01:00

include

style: format code using clang-format 15.0.6

2023-01-05 10:33:47 +01:00

source

style: configure readability-identifier-naming.FunctionCase

2022-05-17 20:55:56 +02:00

sysman

Cleanup includes 57

2023-02-17 11:19:59 +01:00

tools

Cleanup includes 57

2023-02-17 11:19:59 +01:00

CMakeLists.txt

add intel-level-zero-gpu-devel

2023-02-17 14:55:28 +01:00

os_release_info.cmake

lint revision update

2021-11-23 12:50:25 +01:00

ze_intel_gpu_version.h.in

Add version information to ze_intel_gpu DLL

2021-05-21 17:11:07 +02:00