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e182aa6055
Use single call for programming thread arbitration logic in flushTask. Related-To: NEO-5995 Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
129 lines
5.2 KiB
C++
129 lines
5.2 KiB
C++
/*
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* Copyright (C) 2018-2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_stream/preemption.h"
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#include "shared/source/command_stream/stream_properties.h"
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#include "shared/source/command_stream/thread_arbitration_policy.h"
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#include "shared/source/gen9/reg_configs.h"
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#include "shared/source/helpers/preamble.h"
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#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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#include "shared/test/unit_test/preamble/preamble_fixture.h"
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using namespace NEO;
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typedef PreambleFixture SklSlm;
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SKLTEST_F(SklSlm, WhenL3ConfigIsDispatchedThenProperRegisterAddressAndValueAreProgrammed) {
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typedef SKLFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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uint32_t l3Config = PreambleHelper<FamilyType>::getL3Config(*defaultHwInfo, true);
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PreambleHelper<SKLFamily>::programL3(&cs, l3Config);
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parseCommands<SKLFamily>(cs);
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auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorLRI);
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const auto &lri = *reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
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auto RegisterOffset = L3CNTLRegisterOffset<FamilyType>::registerOffset;
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EXPECT_EQ(RegisterOffset, lri.getRegisterOffset());
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EXPECT_EQ(1u, lri.getDataDword() & 1);
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}
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typedef PreambleFixture Gen9L3Config;
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SKLTEST_F(Gen9L3Config, GivenNoSlmWhenProgrammingL3ThenProgrammingIsCorrect) {
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bool slmUsed = false;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_SKYLAKE>(slmUsed);
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EXPECT_EQ(0x80000340u, l3Config);
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uint32_t errorDetectionBehaviorControlBit = 1 << 9;
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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l3Config = getL3ConfigHelper<IGFX_BROXTON>(slmUsed);
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EXPECT_EQ(0x80000340u, l3Config);
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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}
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SKLTEST_F(Gen9L3Config, GivenSlmWhenProgrammingL3ThenProgrammingIsCorrect) {
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bool slmUsed = true;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_SKYLAKE>(slmUsed);
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EXPECT_EQ(0x60000321u, l3Config);
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uint32_t errorDetectionBehaviorControlBit = 1 << 9;
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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l3Config = getL3ConfigHelper<IGFX_BROXTON>(slmUsed);
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EXPECT_EQ(0x60000321u, l3Config);
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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}
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typedef PreambleFixture ThreadArbitration;
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SKLTEST_F(ThreadArbitration, GivenDefaultWhenProgrammingPreambleThenArbitrationPolicyIsRoundRobin) {
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EXPECT_EQ(ThreadArbitrationPolicy::RoundRobin, HwHelperHw<SKLFamily>::get().getDefaultThreadArbitrationPolicy());
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}
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SKLTEST_F(ThreadArbitration, whenGetSupportedThreadArbitrationPoliciesIsCalledThenAgeBasedAndRoundRobinAreReturned) {
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auto supportedPolicies = PreambleHelper<SKLFamily>::getSupportedThreadArbitrationPolicies();
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EXPECT_EQ(2u, supportedPolicies.size());
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EXPECT_NE(supportedPolicies.end(), std::find(supportedPolicies.begin(),
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supportedPolicies.end(),
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ThreadArbitrationPolicy::AgeBased));
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EXPECT_NE(supportedPolicies.end(), std::find(supportedPolicies.begin(),
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supportedPolicies.end(),
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ThreadArbitrationPolicy::RoundRobin));
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}
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GEN9TEST_F(PreambleVfeState, GivenWaOffWhenProgrammingVfeStateThenProgrammingIsCorrect) {
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typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
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testWaTable->flags.waSendMIFLUSHBeforeVFE = 0;
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LinearStream &cs = linearStream;
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auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, pDevice->getHardwareInfo(), EngineGroupType::RenderCompute);
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StreamProperties emptyProperties{};
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PreambleHelper<FamilyType>::programVfeState(pVfeCmd, pDevice->getHardwareInfo(), 0u, 0, 168u, emptyProperties);
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parseCommands<FamilyType>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_FALSE(pc.getRenderTargetCacheFlushEnable());
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EXPECT_FALSE(pc.getDepthCacheFlushEnable());
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EXPECT_FALSE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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GEN9TEST_F(PreambleVfeState, GivenWaOnWhenProgrammingVfeStateThenProgrammingIsCorrect) {
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typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
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testWaTable->flags.waSendMIFLUSHBeforeVFE = 1;
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LinearStream &cs = linearStream;
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auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, pDevice->getHardwareInfo(), EngineGroupType::RenderCompute);
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StreamProperties emptyProperties{};
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PreambleHelper<FamilyType>::programVfeState(pVfeCmd, pDevice->getHardwareInfo(), 0u, 0, 168u, emptyProperties);
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parseCommands<FamilyType>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_TRUE(pc.getRenderTargetCacheFlushEnable());
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EXPECT_TRUE(pc.getDepthCacheFlushEnable());
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EXPECT_TRUE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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