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compute-runtime/level_zero
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Maciej Dziuban 138f04bdcd Enable L1 cache for Tigerlake 
Change-Id: I33513ed084f9d06ceca11315cac03f1b682db535
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-4832
2020-10-06 13:26:54 +02:00
..
api
Adding Frequency Support for Windows in Level 0 Sysman
2020-09-19 08:30:13 +02:00
cmake
Removing unnecessary files
2020-08-28 15:32:19 +02:00
core
Enable L1 cache for Tigerlake
2020-10-06 13:26:54 +02:00
ddi
level-zero v1.0 (2/N)
2020-08-03 13:11:13 +02:00
doc
stop building on Ubuntu 19.10
2020-08-26 13:29:35 +02:00
experimental
Create TestEnvironment in ze_intel_gpu_core_tests
2020-09-11 09:53:58 +02:00
source
Correct SO version in library
2020-08-04 22:47:00 +02:00
tools
Fix zesDeviceReset for Spec version 1.
2020-10-05 19:55:14 +02:00
CMakeLists.txt
Create a library with .spv kernels for L0 use
2020-09-08 13:06:40 +02:00
os_release_info.cmake
Cmake format script
2020-08-19 16:36:30 +02:00