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f55ad93baf
L3 bank count should be queried from KMD L3 bank size should be queried from device blob Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
42 lines
1.6 KiB
C++
42 lines
1.6 KiB
C++
/*
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* Copyright (C) 2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/helpers/hw_info.h"
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#include "shared/test/common/test_macros/test.h"
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using namespace NEO;
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TEST(HwInfoTest, whenSettingDefaultFeatureTableAndWorkaroundTableThenProperFieldsAreSet) {
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HardwareInfo hwInfo{};
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FeatureTable expectedFeatureTable{};
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WorkaroundTable expectedWorkaroundTable{};
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expectedFeatureTable.flags.ftrAstcHdr2D = true;
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expectedFeatureTable.flags.ftrAstcLdr2D = true;
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expectedFeatureTable.flags.ftrCCSNode = true;
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expectedFeatureTable.flags.ftrCCSRing = true;
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expectedFeatureTable.flags.ftrFbc = true;
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expectedFeatureTable.flags.ftrGpGpuMidBatchPreempt = true;
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expectedFeatureTable.flags.ftrGpGpuThreadGroupLevelPreempt = true;
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expectedFeatureTable.flags.ftrIA32eGfxPTEs = true;
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expectedFeatureTable.flags.ftrL3IACoherency = true;
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expectedFeatureTable.flags.ftrLinearCCS = true;
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expectedFeatureTable.flags.ftrPPGTT = true;
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expectedFeatureTable.flags.ftrSVM = true;
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expectedFeatureTable.flags.ftrStandardMipTailFormat = true;
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expectedFeatureTable.flags.ftrTileMappedResource = true;
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expectedFeatureTable.flags.ftrTranslationTable = true;
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expectedFeatureTable.flags.ftrUserModeTranslationTable = true;
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expectedWorkaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface = true;
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setupDefaultFeatureTableAndWorkaroundTable(&hwInfo);
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EXPECT_EQ(expectedFeatureTable.asHash(), hwInfo.featureTable.asHash());
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EXPECT_EQ(expectedWorkaroundTable.asHash(), hwInfo.workaroundTable.asHash());
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}
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