intel/llvm
1
0
Fork 0
mirror of https://github.com/intel/llvm.git synced 2026-01-13 19:08:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

[MLIR][Python] Fix AffineIfOp insertion point (#171957)

Browse Source 
This bug was introduced by #108323, where the loc and ip were not
properly set. It may lead to errors when the operations are not linearly
asserted to the IR.
This commit is contained in:
Hongzheng Chen
2025-12-11 23:23:46 -05:00
committed by GitHub
parent ecaf673850
commit 1335a05ab8
2 changed files with 29 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
mlir/python/mlir/dialects/affine.py
View File

@@ -198,7 +198,7 @@ class AffineIfOp(AffineIfOp):
results = []
results.extend(results_)
super().__init__(results, cond_operands, cond)
super().__init__(results, cond_operands, cond, loc=loc, ip=ip)
self.regions[0].blocks.append(*[])
if has_else:
self.regions[1].blocks.append(*[])