From 2002e1f1bf7e9f6078fc789bbead3b63d04fe33f Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Tue, 7 Sep 2010 18:11:53 +0000 Subject: [PATCH] Adjust a test that's expecting optimizations to be done on MMX palignr; we don't do this for the intrinsics. llvm-svn: 113234 --- clang/test/CodeGen/palignr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/clang/test/CodeGen/palignr.c b/clang/test/CodeGen/palignr.c index e9c1dbd012b5..ed86c9ec13cb 100644 --- a/clang/test/CodeGen/palignr.c +++ b/clang/test/CodeGen/palignr.c @@ -17,13 +17,13 @@ int4 align4(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 32); } #define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n))) typedef __attribute__((vector_size(8))) int int2; -// CHECK-NOT: palignr +// CHECK: palignr int2 align5(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 8); } -// CHECK: psrlq +// CHECK: palignr int2 align6(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 9); } -// CHECK: xor +// CHECK: palignr int2 align7(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 16); } // CHECK: palignr