From 4620032ee304aae35a12b3e8927f0e27f527f4e1 Mon Sep 17 00:00:00 2001 From: Nick Kreeger Date: Sat, 23 Apr 2022 20:14:48 -0500 Subject: [PATCH] Revert "[mlir][sparse] Expose SpareTensor passes as enums instead of opaque numbers for vectorization and parallelization options." This reverts commit d59cf901cbae7991f7847eb038d825efff1221ad. Build fails on NVIDIA Sparse tests: https://lab.llvm.org/buildbot/#/builders/61/builds/25447 --- mlir/benchmark/python/common.py | 2 +- .../Dialect/SparseTensor/Pipelines/Passes.h | 16 ++++---- .../Dialect/SparseTensor/Transforms/Passes.h | 6 +++ .../Dialect/SparseTensor/Transforms/Passes.td | 32 ++-------------- .../Transforms/SparseTensorPasses.cpp | 37 +++++++++++++++++-- .../Dialect/SparseTensor/sparse_parallel.mlir | 10 ++--- .../Dialect/SparseTensor/sparse_vector.mlir | 10 ++--- .../SparseTensor/sparse_vector_chain.mlir | 2 +- .../SparseTensor/sparse_vector_index.mlir | 2 +- .../SparseTensor/sparse_vector_peeled.mlir | 2 +- .../Dialect/SparseTensor/CPU/sparse_cast.mlir | 2 +- .../CPU/sparse_filter_conv2d.mlir | 2 +- .../SparseTensor/CPU/sparse_flatten.mlir | 2 +- .../SparseTensor/CPU/sparse_index_dense.mlir | 2 +- .../SparseTensor/CPU/sparse_matvec.mlir | 2 +- .../SparseTensor/CPU/sparse_mttkrp.mlir | 2 +- .../SparseTensor/CPU/sparse_out_simple.mlir | 2 +- .../CPU/sparse_quantized_matmul.mlir | 2 +- .../SparseTensor/CPU/sparse_reductions.mlir | 2 +- .../CPU/sparse_sampled_matmul.mlir | 2 +- .../CPU/sparse_sampled_mm_fusion.mlir | 2 +- .../SparseTensor/CPU/sparse_scale.mlir | 2 +- .../Dialect/SparseTensor/CPU/sparse_spmm.mlir | 2 +- .../Dialect/SparseTensor/CPU/sparse_sum.mlir | 2 +- .../Dialect/SparseTensor/python/test_SDDMM.py | 26 ++++++------- .../Dialect/SparseTensor/python/test_SpMM.py | 6 ++- .../SparseTensor/python/test_stress.py | 6 ++- 27 files changed, 99 insertions(+), 86 deletions(-) diff --git a/mlir/benchmark/python/common.py b/mlir/benchmark/python/common.py index 31875f16bfdc..da0ef20a1829 100644 --- a/mlir/benchmark/python/common.py +++ b/mlir/benchmark/python/common.py @@ -16,7 +16,7 @@ def setup_passes(mlir_module): """Setup pass pipeline parameters for benchmark functions. """ opt = ( - "parallelization-strategy=none" + "parallelization-strategy=0" " vectorization-strategy=0 vl=1 enable-simd-index32=False" ) pipeline = f"sparse-compiler{{{opt}}}" diff --git a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h index 0c896872dd33..a7064a250831 100644 --- a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h +++ b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h @@ -30,14 +30,12 @@ namespace sparse_tensor { struct SparseCompilerOptions : public PassPipelineOptions { // These options must be kept in sync with `SparsificationBase`. - - PassOptions::Option parallelization{ + PassOptions::Option parallelization{ *this, "parallelization-strategy", - desc("Set the parallelization strategy"), - init(SparseParallelizationStrategy::kNone)}; - PassOptions::Option vectorization{ + desc("Set the parallelization strategy"), init(0)}; + PassOptions::Option vectorization{ *this, "vectorization-strategy", desc("Set the vectorization strategy"), - init(SparseVectorizationStrategy::kNone)}; + init(0)}; PassOptions::Option vectorLength{ *this, "vl", desc("Set the vector length"), init(1)}; PassOptions::Option enableSIMDIndex32{ @@ -49,8 +47,10 @@ struct SparseCompilerOptions /// Projects out the options for `createSparsificationPass`. SparsificationOptions sparsificationOptions() const { - return SparsificationOptions(parallelization, vectorization, vectorLength, - enableSIMDIndex32, enableVLAVectorization); + return SparsificationOptions(sparseParallelizationStrategy(parallelization), + sparseVectorizationStrategy(vectorization), + vectorLength, enableSIMDIndex32, + enableVLAVectorization); } // These options must be kept in sync with `SparseTensorConversionBase`. diff --git a/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h b/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h index 92afe5ea8c1a..20a322e97dfc 100644 --- a/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h +++ b/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h @@ -45,6 +45,9 @@ enum class SparseParallelizationStrategy { // TODO: support reduction parallelization too? }; +/// Converts command-line parallelization flag to the strategy enum. +SparseParallelizationStrategy sparseParallelizationStrategy(int32_t flag); + /// Defines a vectorization strategy. Any inner loop is a candidate (full SIMD /// for parallel loops and horizontal SIMD for reduction loops). A loop is /// actually vectorized if (1) allowed by the strategy, and (2) the emitted @@ -55,6 +58,9 @@ enum class SparseVectorizationStrategy { kAnyStorageInnerLoop }; +/// Converts command-line vectorization flag to the strategy enum. +SparseVectorizationStrategy sparseVectorizationStrategy(int32_t flag); + /// Options for the Sparsification pass. struct SparsificationOptions { SparsificationOptions(SparseParallelizationStrategy p, diff --git a/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td b/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td index e7c16def6daf..6e36259de949 100644 --- a/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td +++ b/mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td @@ -63,34 +63,10 @@ def Sparsification : Pass<"sparsification", "ModuleOp"> { "vector::VectorDialect", ]; let options = [ - Option<"parallelization", "parallelization-strategy", "enum SparseParallelizationStrategy", - "mlir::SparseParallelizationStrategy::kNone", - "Set the parallelization strategy", [{llvm::cl::values( - clEnumValN(mlir::SparseParallelizationStrategy::kNone, "none", - "Turn off sparse parallelization."), - clEnumValN(mlir::SparseParallelizationStrategy::kDenseOuterLoop, - "dense-outer-loop", - "Enable dense outer loop sparse parallelization."), - clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageOuterLoop, - "any-storage-outer-loop", - "Enable sparse parallelization regardless of storage for the outer loop."), - clEnumValN(mlir::SparseParallelizationStrategy::kDenseAnyLoop, - "dense-any-loop", - "Enable dense parallelization for any loop."), - clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop, - "any-storage-any-loop", - "Enable sparse parallelization for any storage and loop."))}]>, - Option<"vectorization", "vectorization-strategy", "enum SparseVectorizationStrategy", - "mlir::SparseVectorizationStrategy::kNone", - "Set the vectorization strategy", [{llvm::cl::values( - clEnumValN(mlir::SparseVectorizationStrategy::kNone, "none", - "Turn off sparse vectorization."), - clEnumValN(mlir::SparseVectorizationStrategy::kDenseInnerLoop, - "dense-inner-loop", - "Enable vectorization for dense inner loops."), - clEnumValN(mlir::SparseVectorizationStrategy::kAnyStorageInnerLoop, - "any-storage-inner-loop", - "Enable sparse vectorization for inner loops with any storage."))}]>, + Option<"parallelization", "parallelization-strategy", "int32_t", "0", + "Set the parallelization strategy">, + Option<"vectorization", "vectorization-strategy", "int32_t", "0", + "Set the vectorization strategy">, Option<"vectorLength", "vl", "int32_t", "1", "Set the vector length">, Option<"enableSIMDIndex32", "enable-simd-index32", "bool", "false", diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp index 4a9e9ae1f667..2b957e6fbad6 100644 --- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp +++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp @@ -39,8 +39,8 @@ struct SparsificationPass : public SparsificationBase { SparsificationPass() = default; SparsificationPass(const SparsificationPass &pass) = default; SparsificationPass(const SparsificationOptions &options) { - parallelization = options.parallelizationStrategy; - vectorization = options.vectorizationStrategy; + parallelization = static_cast(options.parallelizationStrategy); + vectorization = static_cast(options.vectorizationStrategy); vectorLength = options.vectorLength; enableSIMDIndex32 = options.enableSIMDIndex32; enableVLAVectorization = options.enableVLAVectorization; @@ -50,8 +50,10 @@ struct SparsificationPass : public SparsificationBase { auto *ctx = &getContext(); RewritePatternSet patterns(ctx); // Translate strategy flags to strategy options. - SparsificationOptions options(parallelization, vectorization, vectorLength, - enableSIMDIndex32, enableVLAVectorization); + SparsificationOptions options( + sparseParallelizationStrategy(parallelization), + sparseVectorizationStrategy(vectorization), vectorLength, + enableSIMDIndex32, enableVLAVectorization); // Apply rewriting. populateSparsificationPatterns(patterns, options); vector::populateVectorToVectorCanonicalizationPatterns(patterns); @@ -131,6 +133,33 @@ struct SparseTensorConversionPass } // namespace +SparseParallelizationStrategy +mlir::sparseParallelizationStrategy(int32_t flag) { + switch (flag) { + default: + return SparseParallelizationStrategy::kNone; + case 1: + return SparseParallelizationStrategy::kDenseOuterLoop; + case 2: + return SparseParallelizationStrategy::kAnyStorageOuterLoop; + case 3: + return SparseParallelizationStrategy::kDenseAnyLoop; + case 4: + return SparseParallelizationStrategy::kAnyStorageAnyLoop; + } +} + +SparseVectorizationStrategy mlir::sparseVectorizationStrategy(int32_t flag) { + switch (flag) { + default: + return SparseVectorizationStrategy::kNone; + case 1: + return SparseVectorizationStrategy::kDenseInnerLoop; + case 2: + return SparseVectorizationStrategy::kAnyStorageInnerLoop; + } +} + SparseToSparseConversionStrategy mlir::sparseToSparseConversionStrategy(int32_t flag) { switch (flag) { diff --git a/mlir/test/Dialect/SparseTensor/sparse_parallel.mlir b/mlir/test/Dialect/SparseTensor/sparse_parallel.mlir index 5e0268191fbf..9af037c7829a 100644 --- a/mlir/test/Dialect/SparseTensor/sparse_parallel.mlir +++ b/mlir/test/Dialect/SparseTensor/sparse_parallel.mlir @@ -1,12 +1,12 @@ -// RUN: mlir-opt %s -sparsification="parallelization-strategy=none" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=0" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR0 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-outer-loop" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=1" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR1 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-outer-loop" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=2" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR2 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-any-loop" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=3" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR3 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-any-loop" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=4" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR4 #DenseMatrix = #sparse_tensor.encoding<{ diff --git a/mlir/test/Dialect/SparseTensor/sparse_vector.mlir b/mlir/test/Dialect/SparseTensor/sparse_vector.mlir index be0aee2d46a6..1425a7b89621 100644 --- a/mlir/test/Dialect/SparseTensor/sparse_vector.mlir +++ b/mlir/test/Dialect/SparseTensor/sparse_vector.mlir @@ -1,12 +1,12 @@ -// RUN: mlir-opt %s -sparsification="vectorization-strategy=none vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=0 vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC0 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=dense-inner-loop vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=1 vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC1 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC2 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32=true" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16 enable-simd-index32=true" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC3 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=4 enable-vla-vectorization=true" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=4 enable-vla-vectorization=true" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC4 #DenseVector = #sparse_tensor.encoding<{ dimLevelType = [ "dense" ] }> diff --git a/mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir b/mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir index e27c2d826fc7..df55b8373e0e 100644 --- a/mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir +++ b/mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/generate-test-checks.py -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \ // RUN: FileCheck %s #SparseMatrix = #sparse_tensor.encoding<{dimLevelType = ["dense","compressed"]}> diff --git a/mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir b/mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir index 5665f18f9680..792e74193149 100644 --- a/mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir +++ b/mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir @@ -5,7 +5,7 @@ // about what constitutes a good test! The CHECK should be // minimized and named to reflect the test intent. -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \ // RUN: FileCheck %s #SparseVector = #sparse_tensor.encoding<{ diff --git a/mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir b/mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir index 276b8a9b8b93..65f1f7216bed 100644 --- a/mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir +++ b/mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir @@ -1,4 +1,4 @@ -// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -scf-for-loop-peeling -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -scf-for-loop-peeling -canonicalize | \ // RUN: FileCheck %s #SparseVector = #sparse_tensor.encoding<{ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir index d7d192dc5be0..577bca6a23f1 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir @@ -6,7 +6,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir index bb2e3a2369b2..6f86ac56a059 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir index 78dde398b16a..d7467b3d59af 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.tns" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir index 74e936371732..b0da613a17ce 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir index 007e34fb3aca..517f811d0748 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir @@ -8,7 +8,7 @@ // Do the same run, but now with SIMDization as well. This should not change the outcome. // // RUN: mlir-opt %s \ -// RUN: --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32" | \ +// RUN: --sparse-compiler="vectorization-strategy=2 vl=16 enable-simd-index32" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir index 8042ab744746..1400d376ae27 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/mttkrp_b.tns" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir index 3dcdc018f143..95bc06de123d 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir index aec01cb99f1f..33daf749247b 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir index 1bcc1ba35a6a..83406e695297 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=8" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir index 7efc4537dcdb..de9c9f1a8210 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir @@ -8,7 +8,7 @@ // Do the same run, but now with SIMDization as well. This should not change the outcome. // // RUN: mlir-opt %s \ -// RUN: --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4 enable-simd-index32" | \ +// RUN: --sparse-compiler="vectorization-strategy=2 vl=4 enable-simd-index32" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir index db205aff97a3..aadb8b3e88e1 100755 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=8" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir index 351b67859f67..09a17e10ba5a 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir @@ -6,7 +6,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir index 674cb562ef21..6ced1f75c13f 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir index 5d37f591ce89..d14d9567d971 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test_symmetric.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ diff --git a/mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py b/mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py index a6abb3cc4605..4ed741ed3727 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py +++ b/mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py @@ -140,24 +140,22 @@ def main(): ir.AffineMap.get_permutation([0, 1]), ir.AffineMap.get_permutation([1, 0]) ] - vec_strategy = [ - 'none', 'dense-inner-loop' - ] for level in levels: for ordering in orderings: for pwidth in [32]: for iwidth in [32]: - for vec in vec_strategy: - for e in [True]: - vl = 1 if vec == 0 else 16 - attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth) - opt = (f'parallelization-strategy=none ' - f'vectorization-strategy={vec} ' - f'vl={vl} enable-simd-index32={e}') - compiler = sparse_compiler.SparseCompiler( - options=opt, opt_level=0, shared_libs=[support_lib]) - build_compile_and_run_SDDMMM(attr, compiler) - count = count + 1 + for par in [0]: + for vec in [0, 1]: + for e in [True]: + vl = 1 if vec == 0 else 16 + attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth) + opt = (f'parallelization-strategy={par} ' + f'vectorization-strategy={vec} ' + f'vl={vl} enable-simd-index32={e}') + compiler = sparse_compiler.SparseCompiler( + options=opt, opt_level=0, shared_libs=[support_lib]) + build_compile_and_run_SDDMMM(attr, compiler) + count = count + 1 # CHECK: Passed 16 tests print('Passed ', count, 'tests') diff --git a/mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py b/mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py index 57ca3d6e1a94..9712620a4a7a 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py +++ b/mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py @@ -120,10 +120,12 @@ def main(): # a *single* sparse tensor. Note that we deliberate do not exhaustively # search the full state space to reduce runtime of the test. It is # straightforward to adapt the code below to explore more combinations. + par = 0 + vec = 0 vl = 1 e = False - opt = (f'parallelization-strategy=none ' - f'vectorization-strategy=none ' + opt = (f'parallelization-strategy={par} ' + f'vectorization-strategy={vec} ' f'vl={vl} enable-simd-index32={e}') levels = [[st.DimLevelType.dense, st.DimLevelType.dense], [st.DimLevelType.dense, st.DimLevelType.compressed], diff --git a/mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py b/mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py index e134f78c5f57..76dfd3cf145f 100644 --- a/mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py +++ b/mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py @@ -182,11 +182,13 @@ def main(): # CHECK-LABEL: TEST: test_stress print("\nTEST: test_stress") with ir.Context() as ctx, ir.Location.unknown(): + par = 0 + vec = 0 vl = 1 e = False sparsification_options = ( - f'parallelization-strategy=none ' - f'vectorization-strategy=none ' + f'parallelization-strategy={par} ' + f'vectorization-strategy={vec} ' f'vl={vl} ' f'enable-simd-index32={e}') compiler = sparse_compiler.SparseCompiler(