From 8202c6dbdfbd94290d5d3c3acbecf111a17e0f47 Mon Sep 17 00:00:00 2001
From: Saleem Abdulrasool <compnerd@compnerd.org>
Date: Fri, 5 Aug 2016 17:28:21 +0000
Subject: [PATCH] COFF ARM: Clear the J1 and J2 bits when applying relocations
 to 24 bit branches
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The opcode for the bl branches can initially be F000 F800, i.e.
the J1 and J2 bits are already set. Therefore mask these bits out
before or'ing in the new bits.

Patch by Martin Storsjö!

llvm-svn: 277836
---
 lld/COFF/Chunks.cpp          |  3 ++-
 lld/test/COFF/reloc-arm.test | 13 +++++++++++--
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index 1c1b18176aa2..2e6f535cf861 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -103,7 +103,8 @@ static void applyBranch24T(uint8_t *Off, int32_t V) {
   uint32_t J1 = ((~V >> 23) & 1) ^ S;
   uint32_t J2 = ((~V >> 22) & 1) ^ S;
   or16(Off, (S << 10) | ((V >> 12) & 0x3ff));
-  or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
+  // Clear out the J1 and J2 bits which may be set.
+  write16le(Off + 2, (read16le(Off + 2) & 0xd000) | (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
 }
 
 void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, Defined *Sym,
diff --git a/lld/test/COFF/reloc-arm.test b/lld/test/COFF/reloc-arm.test
index 11b863d4390b..f7656e7ac6a5 100644
--- a/lld/test/COFF/reloc-arm.test
+++ b/lld/test/COFF/reloc-arm.test
@@ -9,7 +9,7 @@
 # CHECK: 402030 fe07e62f 00000000 00000000 00000000
 # CHECK: 402040 3e04de2f 00000000 00000000 00000000
 # CHECK: 402050 fe07d62f 00000000 00000000 00000000
-# CHECK: 402060 00000000 00000000 00000000 00000000
+# CHECK: 402060 fef0cef7 00000000 00000000 00000000
 
 --- !COFF
 header:
@@ -23,7 +23,7 @@ sections:
   - Name:            .text
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       4096
-    SectionData:     00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+    SectionData:     00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f000f8000000000000000000000000
     Relocations:
       - VirtualAddress:  0
         SymbolName:      foo
@@ -43,6 +43,9 @@ sections:
       - VirtualAddress:  80
         SymbolName:      foo
         Type:            21  # IMAGE_REL_AMD64_BLX23T
+      - VirtualAddress:  96
+        SymbolName:      bar
+        Type:            20  # IMAGE_REL_ARM_BRANCH24T
 symbols:
   - Name:            .aaa
     Value:           0
@@ -68,4 +71,10 @@ symbols:
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
+  - Name:            bar
+    Value:           0x500000
+    SectionNumber:   1
+    SimpleType:      IMAGE_SYM_TYPE_NULL
+    ComplexType:     IMAGE_SYM_DTYPE_NULL
+    StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
 ...