mirror of
https://github.com/intel/llvm.git
synced 2026-01-20 01:58:44 +08:00
[BOLT] Getting open-source ready
Summary:
BOLT sources are being moved under tools/llvm-bolt/src
and tools/llvm-bolt will contain more files such as LICENSE.txt,
README.txt, etc.
Remove trailing white spaces from our sources.
Create llvm.patch by running
> git diff f137ed238db11440f03083b1c88b7ffc0f4af65e include lib > \
tools/llvm-bolt/llvm.patch
README.txt has instructions on checking out sources and applying the
patch.
(cherry picked from FBD7878380)
This commit is contained in:
Maksim Panchenko
326
bolt/src/Relocation.cpp
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326
bolt/src/Relocation.cpp
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@@ -0,0 +1,326 @@
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//===--- Relocation.cpp - Interface for object file relocations ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//===----------------------------------------------------------------------===//
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#include "Relocation.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCStreamer.h"
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using namespace llvm;
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using namespace bolt;
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Triple::ArchType Relocation::Arch;
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bool Relocation::isSupported(uint64_t Type) {
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switch (Type) {
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default:
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return false;
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case ELF::R_X86_64_8:
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case ELF::R_X86_64_16:
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case ELF::R_X86_64_32:
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case ELF::R_X86_64_32S:
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case ELF::R_X86_64_64:
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case ELF::R_X86_64_PC8:
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case ELF::R_X86_64_PC32:
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case ELF::R_X86_64_PC64:
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case ELF::R_X86_64_PLT32:
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case ELF::R_X86_64_GOTPCREL:
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case ELF::R_X86_64_GOTTPOFF:
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case ELF::R_X86_64_TPOFF32:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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case ELF::R_AARCH64_CALL26:
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case ELF::R_AARCH64_ADR_PREL_PG_HI21:
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case ELF::R_AARCH64_LDST64_ABS_LO12_NC:
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case ELF::R_AARCH64_ADD_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
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case ELF::R_AARCH64_ADR_GOT_PAGE:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_LD64_GOT_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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case ELF::R_AARCH64_TLSDESC_CALL:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case ELF::R_AARCH64_JUMP26:
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case ELF::R_AARCH64_PREL32:
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case ELF::R_AARCH64_ABS64:
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return true;
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}
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}
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size_t Relocation::getSizeForType(uint64_t Type) {
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switch (Type) {
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default:
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llvm_unreachable("unsupported relocation type");
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case ELF::R_X86_64_8:
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case ELF::R_X86_64_PC8:
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return 1;
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case ELF::R_X86_64_16:
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return 2;
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case ELF::R_X86_64_PLT32:
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case ELF::R_X86_64_PC32:
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case ELF::R_X86_64_32S:
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case ELF::R_X86_64_32:
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case ELF::R_X86_64_GOTPCREL:
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case ELF::R_X86_64_GOTTPOFF:
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case ELF::R_X86_64_TPOFF32:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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case ELF::R_AARCH64_CALL26:
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case ELF::R_AARCH64_ADR_PREL_PG_HI21:
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case ELF::R_AARCH64_LDST64_ABS_LO12_NC:
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case ELF::R_AARCH64_ADD_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
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case ELF::R_AARCH64_ADR_GOT_PAGE:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_LD64_GOT_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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case ELF::R_AARCH64_TLSDESC_CALL:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case ELF::R_AARCH64_JUMP26:
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case ELF::R_AARCH64_PREL32:
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return 4;
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case ELF::R_X86_64_PC64:
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case ELF::R_X86_64_64:
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case ELF::R_AARCH64_ABS64:
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return 8;
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}
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}
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uint64_t Relocation::extractValue(uint64_t Type, uint64_t Contents,
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uint64_t PC) {
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switch (Type) {
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default:
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llvm_unreachable("unsupported relocation type");
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case ELF::R_AARCH64_ABS64:
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return Contents;
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case ELF::R_AARCH64_PREL32:
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return static_cast<int64_t>(PC) + SignExtend64<32>(Contents & 0xffffffff);
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case ELF::R_AARCH64_TLSDESC_CALL:
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case ELF::R_AARCH64_JUMP26:
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case ELF::R_AARCH64_CALL26:
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// Immediate goes in bits 25:0 of B and BL.
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Contents &= ~0xfffffffffc000000ULL;
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return static_cast<int64_t>(PC) + SignExtend64<28>(Contents << 2);
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case ELF::R_AARCH64_ADR_GOT_PAGE:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case ELF::R_AARCH64_ADR_PREL_PG_HI21: {
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// Bits 32:12 of Symbol address goes in bits 30:29 + 23:5 of ADRP
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// instruction
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Contents &= ~0xffffffff9f00001fUll;
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auto LowBits = (Contents >> 29) & 0x3;
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auto HighBits = (Contents >> 5) & 0x7ffff;
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Contents = LowBits | (HighBits << 2);
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Contents = static_cast<int64_t>(PC) + SignExtend64<32>(Contents << 12);
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Contents &= ~0xfffUll;
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return Contents;
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}
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_LD64_GOT_LO12_NC:
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case ELF::R_AARCH64_LDST64_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of LD/ST instruction, taken
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// from bits 11:3 of Symbol address
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 3);
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}
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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case ELF::R_AARCH64_ADD_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of ADD instruction
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 0);
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}
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case ELF::R_AARCH64_LDST128_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of ADD instruction, taken
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// from bits 11:4 of Symbol address
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 4);
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}
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case ELF::R_AARCH64_LDST32_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of ADD instruction, taken
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// from bits 11:2 of Symbol address
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 2);
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}
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case ELF::R_AARCH64_LDST16_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of ADD instruction, taken
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// from bits 11:1 of Symbol address
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 1);
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}
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case ELF::R_AARCH64_LDST8_ABS_LO12_NC: {
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// Immediate goes in bits 21:10 of ADD instruction, taken
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// from bits 11:0 of Symbol address
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Contents &= ~0xffffffffffc003ffU;
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return Contents >> (10 - 0);
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}
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}
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}
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bool Relocation::isGOT(uint64_t Type) {
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switch (Type) {
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default:
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return false;
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case ELF::R_X86_64_GOT32:
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case ELF::R_X86_64_GOTPCREL:
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case ELF::R_X86_64_GOTTPOFF:
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case ELF::R_X86_64_GOTOFF64:
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case ELF::R_X86_64_GOTPC32:
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case ELF::R_X86_64_GOT64:
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case ELF::R_X86_64_GOTPCREL64:
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case ELF::R_X86_64_GOTPC64:
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case ELF::R_X86_64_GOTPLT64:
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case ELF::R_X86_64_GOTPC32_TLSDESC:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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case ELF::R_AARCH64_ADR_GOT_PAGE:
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_LD64_GOT_LO12_NC:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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case ELF::R_AARCH64_TLSDESC_CALL:
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return true;
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}
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}
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bool Relocation::isTLS(uint64_t Type) {
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switch (Type) {
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default:
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return false;
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case ELF::R_X86_64_TPOFF32:
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case ELF::R_X86_64_TPOFF64:
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case ELF::R_X86_64_GOTTPOFF:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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case ELF::R_AARCH64_TLSDESC_CALL:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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return true;
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}
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}
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bool Relocation::isPCRelative(uint64_t Type) {
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switch (Type) {
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default:
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llvm_unreachable("Unknown relocation type");
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case ELF::R_X86_64_64:
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case ELF::R_X86_64_32:
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case ELF::R_X86_64_32S:
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case ELF::R_X86_64_16:
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case ELF::R_X86_64_8:
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case ELF::R_X86_64_TPOFF32:
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case ELF::R_AARCH64_ABS64:
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case ELF::R_AARCH64_LDST64_ABS_LO12_NC:
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case ELF::R_AARCH64_ADD_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
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case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
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case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case ELF::R_AARCH64_LD64_GOT_LO12_NC:
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case ELF::R_AARCH64_TLSDESC_LD64_LO12:
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case ELF::R_AARCH64_TLSDESC_ADD_LO12:
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return false;
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case ELF::R_X86_64_PC8:
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case ELF::R_X86_64_PC32:
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case ELF::R_X86_64_GOTPCREL:
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case ELF::R_X86_64_PLT32:
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case ELF::R_X86_64_GOTTPOFF:
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case ELF::R_X86_64_GOTPCRELX:
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case ELF::R_X86_64_REX_GOTPCRELX:
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case ELF::R_AARCH64_TLSDESC_CALL:
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case ELF::R_AARCH64_CALL26:
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case ELF::R_AARCH64_ADR_PREL_PG_HI21:
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case ELF::R_AARCH64_ADR_GOT_PAGE:
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case ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case ELF::R_AARCH64_TLSDESC_ADR_PAGE21:
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case ELF::R_AARCH64_JUMP26:
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case ELF::R_AARCH64_PREL32:
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return true;
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}
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}
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size_t Relocation::emit(MCStreamer *Streamer) const {
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const auto Size = getSizeForType(Type);
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auto &Ctx = Streamer->getContext();
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if (isPCRelative(Type)) {
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auto *TempLabel = Ctx.createTempSymbol();
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Streamer->EmitLabel(TempLabel);
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auto Value =
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MCBinaryExpr::createSub(MCSymbolRefExpr::create(Symbol, Ctx),
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MCSymbolRefExpr::create(TempLabel, Ctx),
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Ctx);
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if (Addend) {
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Value = MCBinaryExpr::createAdd(Value,
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MCConstantExpr::create(Addend, Ctx),
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Ctx);
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}
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Streamer->EmitValue(Value, Size);
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} else if (Addend) {
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auto Value = MCBinaryExpr::createAdd(MCSymbolRefExpr::create(Symbol, Ctx),
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MCConstantExpr::create(Addend, Ctx),
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Ctx);
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Streamer->EmitValue(Value, Size);
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} else {
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Streamer->EmitSymbolValue(Symbol, Size);
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}
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return Size;
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}
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#define ELF_RELOC(name, value) #name,
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void Relocation::print(raw_ostream &OS) const {
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static const char *X86RelocNames[] = {
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#include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
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};
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static const char *AArch64RelocNames[] = {
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#include "llvm/BinaryFormat/ELFRelocs/AArch64.def"
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};
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if (Arch == Triple::aarch64)
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OS << AArch64RelocNames[Type];
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else
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OS << X86RelocNames[Type];
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OS << ", 0x" << Twine::utohexstr(Offset);
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if (Symbol) {
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OS << ", " << Symbol->getName();
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}
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if (int64_t(Addend) < 0)
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OS << ", -0x" << Twine::utohexstr(-int64_t(Addend));
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else
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OS << ", 0x" << Twine::utohexstr(Addend);
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OS << ", 0x" << Twine::utohexstr(Value);
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}
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