diff --git a/lldb/utils/test/README-disasm b/lldb/utils/test/README-disasm index 53524af84e6a..00e9ab681a24 100644 --- a/lldb/utils/test/README-disasm +++ b/lldb/utils/test/README-disasm @@ -9,521 +9,398 @@ byte contents. See the following for a sample session using this command: -da0603a-dhcp191:9131529 johnny$ /Volumes/data/lldb/svn/trunk/utils/test/disasm.py -m /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -e MessageComposer.app/MessageComposer -f main --options='-triple=arm-apple-darwin -debug-only=arm-disassembler' -executable: MessageComposer.app/MessageComposer -function: main +[16:26:57] johnny:/Volumes/data/Radar/9131529 $ /Volumes/data/lldb/svn/trunk/utils/test/disasm.py -C 'set shlib-path-substitutions /usr /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr /System /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/System /Library /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/Library' -O '-arch armv7' -m /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -e /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib -f printf --options='-triple=thumb-apple-darwin -debug-only=arm-disassembler' +gdb commands: ['set shlib-path-substitutions /usr /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr /System /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/System /Library /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/Library'] +gdb options: -arch armv7 +executable: /Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS4.3.sdk/usr/lib/libSystem.B.dylib +function: printf llvm-mc: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -llvm-mc options: -triple=arm-apple-darwin -debug-only=arm-disassembler +llvm-mc options: -triple=thumb-apple-darwin -debug-only=arm-disassembler GNU gdb 6.3.50-20050815 (Apple version gdb-1518) (Sat Feb 12 02:56:02 UTC 2011) Copyright 2004 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type "show copying" to see the conditions. There is absolutely no warranty for GDB. Type "show warranty" for details. -This GDB was configured as "--host=x86_64-apple-darwin --target=arm-apple-darwin"... -warning: Unable to read symbols from "dyld" (prefix __dyld_) (not yet mapped into memory). - -warning: Unable to read symbols from "Foundation" (not yet mapped into memory). - -warning: Unable to read symbols for /System/Library/Frameworks/UIKit.framework/UIKit (file not found). - -warning: Unable to read symbols from "UIKit" (not yet mapped into memory). - -warning: Unable to read symbols for /System/Library/Frameworks/CoreGraphics.framework/CoreGraphics (file not found). - -warning: Unable to read symbols from "CoreGraphics" (not yet mapped into memory). - -warning: Unable to read symbols from "MessageUI" (not yet mapped into memory). - -warning: Unable to read symbols from "libSystem.B.dylib" (not yet mapped into memory). - -warning: Unable to read symbols from "libobjc.A.dylib" (not yet mapped into memory). - -warning: Unable to read symbols from "CoreFoundation" (not yet mapped into memory). - -warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/main.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/main.m". - - -warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/MessageComposerAppDelegate.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/Classes/MessageComposerAppDelegate.m". - - -warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/MessageComposerViewController.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/Classes/MessageComposerViewController.m". - - -(gdb) disassemble main -Dump of assembler code for function main: -0x00002180 : push {r7, lr} -0x00002184 : add r7, sp, #0 ; 0x0 -0x00002188 : sub sp, sp, #16 ; 0x10 -0x0000218c : str r0, [sp, #4] -0x00002190 : str r1, [sp] -0x00002194 : ldr r3, [pc, #144] ; 0x222c -0x00002198 : add r3, pc, r3 -0x0000219c : ldr r3, [r3] -0x000021a0 : mov r2, r3 -0x000021a4 : ldr r3, [pc, #132] ; 0x2230 -0x000021a8 : add r3, pc, r3 -0x000021ac : ldr r3, [r3] -0x000021b0 : mov r0, r2 -0x000021b4 : mov r1, r3 -0x000021b8 : bl 0x3ff4 -0x000021bc : mov r3, r0 -0x000021c0 : mov r2, r3 -0x000021c4 : ldr r3, [pc, #104] ; 0x2234 -0x000021c8 : add r3, pc, r3 -0x000021cc : ldr r3, [r3] -0x000021d0 : mov r0, r2 -0x000021d4 : mov r1, r3 -0x000021d8 : bl 0x3ff4 -0x000021dc : mov r3, r0 -0x000021e0 : str r3, [sp, #8] -0x000021e4 : ldr r0, [sp, #4] -0x000021e8 : ldr r1, [sp] -0x000021ec : mov r2, #0 ; 0x0 -0x000021f0 : mov r3, #0 ; 0x0 -0x000021f4 : bl 0x3fec -0x000021f8 : mov r3, r0 -0x000021fc : str r3, [sp, #12] -0x00002200 : ldr r2, [sp, #8] -0x00002204 : ldr r3, [pc, #44] ; 0x2238 -0x00002208 : add r3, pc, r3 -0x0000220c : ldr r3, [r3] -0x00002210 : mov r0, r2 -0x00002214 : mov r1, r3 -0x00002218 : bl 0x3ff4 -0x0000221c : ldr r3, [sp, #12] -0x00002220 : mov r0, r3 -0x00002224 : sub sp, r7, #0 ; 0x0 -0x00002228 : pop {r7, pc} -0x0000222c : strdeq r2, [r0], -r8 -0x00002230 : andeq r2, r0, r12, ror r4 -0x00002234 : andeq r2, r0, r8, asr r4 -0x00002238 : andeq r2, r0, r4, lsl r4 +This GDB was configured as "--host=x86_64-apple-darwin --target=arm-apple-darwin". +: push {r0, r1, r2, r3} +0x0704cdd2 : push {r4, r5, r7, lr} +0x0704cdd4 : add r7, sp, #8 +0x0704cdd6 : sub sp, #4 +0x0704cdd8 : add r3, sp, #20 +0x0704cdda : ldr.w r5, [r3], #4 +0x0704cdde : str r3, [sp, #0] +0x0704cde0 : ldr r3, [pc, #52] (0x704ce18 ) +0x0704cde2 : add r3, pc +0x0704cde4 : ldr r0, [r3, #0] +0x0704cde6 : ldr r4, [r0, #0] +0x0704cde8 : ldr r0, [pc, #48] (0x704ce1c ) +0x0704cdea : add r0, pc +0x0704cdec : ldr r0, [r0, #0] +0x0704cdee : ldr r0, [r0, #0] +0x0704cdf0 : blx 0x707ba30 +0x0704cdf4 : cbnz r0, 0x704cdfe +0x0704cdf6 : ldr r1, [pc, #40] (0x704ce20 ) +0x0704cdf8 : add r1, pc +0x0704cdfa : ldr r1, [r1, #0] +0x0704cdfc : b.n 0x704ce00 +0x0704cdfe : mov r1, r0 +0x0704ce00 : mov r0, r4 +0x0704ce02 : mov r2, r5 +0x0704ce04 : ldr r3, [sp, #0] +0x0704ce06 : bl 0x704ad44 +0x0704ce0a : sub.w sp, r7, #8 ; 0x8 +0x0704ce0e : ldmia.w sp!, {r4, r5, r7, lr} +0x0704ce12 : add sp, #16 +0x0704ce14 : bx lr +0x0704ce16 : nop +0x0704ce18 : movs r3, #142 +0x0704ce1a : lsls r5, r0, #0 +0x0704ce1c : adds r1, #122 +0x0704ce1e : lsls r5, r0, #0 +0x0704ce20 : adds r1, #104 +0x0704ce22 : lsls r5, r0, #0 End of assembler dump. -(gdb) x /4b 0x00002180 -0x2180
: 0x80 0x40 0x2d 0xe9 -(gdb) x /4b 0x00002184 -0x2184 : 0x00 0x70 0x8d 0xe2 -(gdb) x /4b 0x00002188 -0x2188 : 0x10 0xd0 0x4d 0xe2 -(gdb) x /4b 0x0000218c -0x218c : 0x04 0x00 0x8d 0xe5 -(gdb) x /4b 0x00002190 -0x2190 : 0x00 0x10 0x8d 0xe5 -(gdb) x /4b 0x00002194 -0x2194 : 0x90 0x30 0x9f 0xe5 -(gdb) x /4b 0x00002198 -0x2198 : 0x03 0x30 0x8f 0xe0 -(gdb) x /4b 0x0000219c -0x219c : 0x00 0x30 0x93 0xe5 -(gdb) x /4b 0x000021a0 -0x21a0 : 0x03 0x20 0xa0 0xe1 -(gdb) x /4b 0x000021a4 -0x21a4 : 0x84 0x30 0x9f 0xe5 -(gdb) x /4b 0x000021a8 -0x21a8 : 0x03 0x30 0x8f 0xe0 -(gdb) x /4b 0x000021ac -0x21ac : 0x00 0x30 0x93 0xe5 -(gdb) x /4b 0x000021b0 -0x21b0 : 0x02 0x00 0xa0 0xe1 -(gdb) x /4b 0x000021b4 -0x21b4 : 0x03 0x10 0xa0 0xe1 -(gdb) x /4b 0x000021b8 -0x21b8 : 0x8d 0x07 0x00 0xeb -(gdb) x /4b 0x000021bc -0x21bc : 0x00 0x30 0xa0 0xe1 -(gdb) x /4b 0x000021c0 -0x21c0 : 0x03 0x20 0xa0 0xe1 -(gdb) x /4b 0x000021c4 -0x21c4 : 0x68 0x30 0x9f 0xe5 -(gdb) x /4b 0x000021c8 -0x21c8 : 0x03 0x30 0x8f 0xe0 -(gdb) x /4b 0x000021cc -0x21cc : 0x00 0x30 0x93 0xe5 -(gdb) x /4b 0x000021d0 -0x21d0 : 0x02 0x00 0xa0 0xe1 -(gdb) x /4b 0x000021d4 -0x21d4 : 0x03 0x10 0xa0 0xe1 -(gdb) x /4b 0x000021d8 -0x21d8 : 0x85 0x07 0x00 0xeb -(gdb) x /4b 0x000021dc -0x21dc : 0x00 0x30 0xa0 0xe1 -(gdb) x /4b 0x000021e0 -0x21e0 : 0x08 0x30 0x8d 0xe5 -(gdb) x /4b 0x000021e4 -0x21e4 : 0x04 0x00 0x9d 0xe5 -(gdb) x /4b 0x000021e8 -0x21e8 : 0x00 0x10 0x9d 0xe5 -(gdb) x /4b 0x000021ec -0x21ec : 0x00 0x20 0xa0 0xe3 -(gdb) x /4b 0x000021f0 -0x21f0 : 0x00 0x30 0xa0 0xe3 -(gdb) x /4b 0x000021f4 -0x21f4 : 0x7c 0x07 0x00 0xeb -(gdb) x /4b 0x000021f8 -0x21f8 : 0x00 0x30 0xa0 0xe1 -(gdb) x /4b 0x000021fc -0x21fc : 0x0c 0x30 0x8d 0xe5 -(gdb) x /4b 0x00002200 -0x2200 : 0x08 0x20 0x9d 0xe5 -(gdb) x /4b 0x00002204 -0x2204 : 0x2c 0x30 0x9f 0xe5 -(gdb) x /4b 0x00002208 -0x2208 : 0x03 0x30 0x8f 0xe0 -(gdb) x /4b 0x0000220c -0x220c : 0x00 0x30 0x93 0xe5 -(gdb) x /4b 0x00002210 -0x2210 : 0x02 0x00 0xa0 0xe1 -(gdb) x /4b 0x00002214 -0x2214 : 0x03 0x10 0xa0 0xe1 -(gdb) x /4b 0x00002218 -0x2218 : 0x75 0x07 0x00 0xeb -(gdb) x /4b 0x0000221c -0x221c : 0x0c 0x30 0x9d 0xe5 -(gdb) x /4b 0x00002220 -0x2220 : 0x03 0x00 0xa0 0xe1 -(gdb) x /4b 0x00002224 -0x2224 : 0x00 0xd0 0x47 0xe2 -(gdb) x /4b 0x00002228 -0x2228 : 0x80 0x80 0xbd 0xe8 -(gdb) x /4b 0x0000222c -0x222c : 0xf8 0x24 0x00 0x00 -(gdb) x /4b 0x00002230 -0x2230 : 0x7c 0x24 0x00 0x00 -(gdb) x /4b 0x00002234 -0x2234 : 0x58 0x24 0x00 0x00 -(gdb) x /4b 0x00002238 -0x2238 : 0x14 0x24 0x00 0x00 +(gdb) x /2b 0x0704cdd0 +0x704cdd0 : 0x0f 0xb4 +(gdb) x /2b 0x0704cdd2 +0x704cdd2 : 0xb0 0xb5 +(gdb) x /2b 0x0704cdd4 +0x704cdd4 : 0x02 0xaf +(gdb) x /2b 0x0704cdd6 +0x704cdd6 : 0x81 0xb0 +(gdb) x /2b 0x0704cdd8 +0x704cdd8 : 0x05 0xab +(gdb) x /4b 0x0704cdda +0x704cdda : 0x53 0xf8 0x04 0x5b +(gdb) x /2b 0x0704cdde +0x704cdde : 0x00 0x93 +(gdb) x /2b 0x0704cde0 +0x704cde0 : 0x0d 0x4b +(gdb) x /2b 0x0704cde2 +0x704cde2 : 0x7b 0x44 +(gdb) x /2b 0x0704cde4 +0x704cde4 : 0x18 0x68 +(gdb) x /2b 0x0704cde6 +0x704cde6 : 0x04 0x68 +(gdb) x /2b 0x0704cde8 +0x704cde8 : 0x0c 0x48 +(gdb) x /2b 0x0704cdea +0x704cdea : 0x78 0x44 +(gdb) x /2b 0x0704cdec +0x704cdec : 0x00 0x68 +(gdb) x /2b 0x0704cdee +0x704cdee : 0x00 0x68 +(gdb) x /4b 0x0704cdf0 +0x704cdf0 : 0x2e 0xf0 0x1e 0xee +(gdb) x /2b 0x0704cdf4 +0x704cdf4 : 0x18 0xb9 +(gdb) x /2b 0x0704cdf6 +0x704cdf6 : 0x0a 0x49 +(gdb) x /2b 0x0704cdf8 +0x704cdf8 : 0x79 0x44 +(gdb) x /2b 0x0704cdfa +0x704cdfa : 0x09 0x68 +(gdb) x /2b 0x0704cdfc +0x704cdfc : 0x00 0xe0 +(gdb) x /2b 0x0704cdfe +0x704cdfe : 0x01 0x46 +(gdb) x /2b 0x0704ce00 +0x704ce00 : 0x20 0x46 +(gdb) x /2b 0x0704ce02 +0x704ce02 : 0x2a 0x46 +(gdb) x /2b 0x0704ce04 +0x704ce04 : 0x00 0x9b +(gdb) x /4b 0x0704ce06 +0x704ce06 : 0xfd 0xf7 0x9d 0xff +(gdb) x /4b 0x0704ce0a +0x704ce0a : 0xa7 0xf1 0x08 0x0d +(gdb) x /4b 0x0704ce0e +0x704ce0e : 0xbd 0xe8 0xb0 0x40 +(gdb) x /2b 0x0704ce12 +0x704ce12 : 0x04 0xb0 +(gdb) x /2b 0x0704ce14 +0x704ce14 : 0x70 0x47 +(gdb) x /2b 0x0704ce16 +0x704ce16 : 0x00 0xbf +(gdb) x /2b 0x0704ce18 +0x704ce18 : 0x8e 0x23 +(gdb) x /2b 0x0704ce1a +0x704ce1a : 0x05 0x00 +(gdb) x /2b 0x0704ce1c +0x704ce1c : 0x7a 0x31 +(gdb) x /2b 0x0704ce1e +0x704ce1e : 0x05 0x00 +(gdb) x /2b 0x0704ce20 +0x704ce20 : 0x68 0x31 +(gdb) x /2b 0x0704ce22 +0x704ce22 : 0x05 0x00 (gdb) quit -Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=arm-apple-darwin -debug-only=arm-disassembler disasm-input.txt -Opcode=345 Name=STMDB_UPD Format=ARM_FORMAT_LDSTMULFRM(10) +Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=thumb-apple-darwin -debug-only=arm-disassembler disasm-input.txt +Opcode=2305 Name=tPUSH Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0| 1: 1: 0: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 1: 1: 1| ------------------------------------------------------------------------------------------------- - push {r7, lr} -Opcode=23 Name=ADDri Format=ARM_FORMAT_DPFRM(4) + push {r0, r1, r2, r3} +Opcode=2305 Name=tPUSH Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 1: 0| 1: 0: 0: 0| 1: 1: 0: 1| 0: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - add r7, sp, #0 -Opcode=374 Name=SUBri Format=ARM_FORMAT_DPFRM(4) + push {r4, r5, r7, lr} +Opcode=2228 Name=tADDrSPi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 1: 0| 0: 1: 0: 0| 1: 1: 0: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 0| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0| ------------------------------------------------------------------------------------------------- - sub sp, sp, #16 -Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7) + add r7, sp, #8 +Opcode=2328 Name=tSUBspi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 1| ------------------------------------------------------------------------------------------------- - str r0, [sp, #4] -Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7) + sub sp, #4 +Opcode=2228 Name=tADDrSPi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- - str r1, [sp] -Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6) + add r3, sp, #20 +Opcode=1963 Name=t2LDR_POST Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 0: 0: 0: 0| +| 1: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1| 0: 0: 1: 1| 0: 1: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0| 0: 1: 0: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [pc, #144] -Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4) + ldr r5, [r3], #4 +Opcode=2324 Name=tSTRspi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - add r3, pc, r3 -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + str r3, [sp] +Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 1: 1: 0: 1| ------------------------------------------------------------------------------------------------- - ldr r3, [r3] -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + ldr.n r3, #52 +Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 1: 1| ------------------------------------------------------------------------------------------------- - mov r2, r3 -Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6) + add r3, pc +Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 0| 0: 1: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 1| 1: 0: 0: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [pc, #132] -Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4) + ldr r0, [r3] +Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| ------------------------------------------------------------------------------------------------- - add r3, pc, r3 -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + ldr r4, [r0] +Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [r3] -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + ldr.n r0, #48 +Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r0, r2 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + add r0, pc +Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r1, r3 -Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2) + ldr r0, [r0] +Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0| 1: 1: 0: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - bl #7732 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + ldr r0, [r0] +Opcode=2243 Name=tBLXi_r9 Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 1: 1: 0| 1: 1: 1: 0| 0: 0: 0: 1| 1: 1: 1: 0| ------------------------------------------------------------------------------------------------- - mov r3, r0 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + blx #191548 +Opcode=2255 Name=tCBNZ Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 1| 0: 0: 0: 1| 1: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r2, r3 -Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6) + cbnz r0, #6 +Opcode=2275 Name=tLDRpci Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 1: 0: 0: 1| 0: 0: 0: 0| 1: 0: 1: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [pc, #104] -Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4) + ldr.n r1, #40 +Opcode=2223 Name=tADDhirr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 0: 0: 1| ------------------------------------------------------------------------------------------------- - add r3, pc, r3 -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + add r1, pc +Opcode=2274 Name=tLDRi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1| ------------------------------------------------------------------------------------------------- - ldr r3, [r3] -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + ldr r1, [r1] +Opcode=2238 Name=tB Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r0, r2 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + b #0 +Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| ------------------------------------------------------------------------------------------------- - mov r1, r3 -Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2) + mov r1, r0 +Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - bl #7700 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + mov r0, r4 +Opcode=2294 Name=tMOVr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 1: 0: 1: 0| ------------------------------------------------------------------------------------------------- - mov r3, r0 -Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7) + mov r2, r5 +Opcode=2278 Name=tLDRspi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - str r3, [sp, #8] -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + ldr r3, [sp] +Opcode=2246 Name=tBLr9 Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| +| 1: 1: 1: 1| 0: 1: 1: 1| 1: 1: 1: 1| 1: 1: 0: 1| 1: 1: 1: 1| 1: 1: 1: 1| 1: 0: 0: 1| 1: 1: 0: 1| ------------------------------------------------------------------------------------------------- - ldr r0, [sp, #4] -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + bl #-8390 +Opcode=2153 Name=t2SUBri Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 1: 1: 1| 0: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 0| 1: 0: 0: 0| ------------------------------------------------------------------------------------------------- - ldr r1, [sp] -Opcode=189 Name=MOVi Format=ARM_FORMAT_DPFRM(4) + sub.w sp, r7, #8 +Opcode=1926 Name=t2LDMIA_UPD Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 1: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 1: 1: 1: 0| 1: 0: 0: 0| 1: 0: 1: 1| 1: 1: 0: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r2, #0 -Opcode=189 Name=MOVi Format=ARM_FORMAT_DPFRM(4) + pop.w {r4, r5, r7, lr} +Opcode=2230 Name=tADDspi Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 1: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| ------------------------------------------------------------------------------------------------- - mov r3, #0 -Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2) + add sp, #16 +Opcode=2250 Name=tBX_RET Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 1: 1: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - bl #7664 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + bx lr +Opcode=2300 Name=tNOP Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- - mov r3, r0 -Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7) + nop +Opcode=2293 Name=tMOVi8 Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 0| ------------------------------------------------------------------------------------------------- - str r3, [sp, #12] -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + movs r3, #142 +Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- - ldr r2, [sp, #8] -Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6) + movs r5, r0 +Opcode=2225 Name=tADDi8 Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0| 1: 1: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 1| 0: 1: 1: 1| 1: 0: 1: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [pc, #44] -Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4) + adds r1, #122 +Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- - add r3, pc, r3 -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) + movs r5, r0 +Opcode=2225 Name=tADDi8 Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 1| 0: 1: 1: 0| 1: 0: 0: 0| ------------------------------------------------------------------------------------------------- - ldr r3, [r3] -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) + adds r1, #104 +Opcode=2290 Name=tMOVSr Format=ARM_FORMAT_THUMBFRM(25) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| +| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- - mov r0, r2 -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| -------------------------------------------------------------------------------------------------- - - mov r1, r3 -Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 0: 1: 0: 1| -------------------------------------------------------------------------------------------------- - - bl #7636 -Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| -------------------------------------------------------------------------------------------------- - - ldr r3, [sp, #12] -Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| -------------------------------------------------------------------------------------------------- - - mov r0, r3 -Opcode=374 Name=SUBri Format=ARM_FORMAT_DPFRM(4) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| -------------------------------------------------------------------------------------------------- - - sub sp, r7, #0 -Opcode=135 Name=LDMIA_UPD Format=ARM_FORMAT_LDSTMULFRM(10) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 1: 1: 1: 0| 1: 0: 0: 0| 1: 0: 1: 1| 1: 1: 0: 1| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0| -------------------------------------------------------------------------------------------------- - - pop {r7, pc} -Opcode=356 Name=STRD_POST Format=ARM_FORMAT_STMISCFRM(9) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 0: 0: 0| -------------------------------------------------------------------------------------------------- - - strdeq r2, r3, [r0], -r8 -Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 1: 0: 0| -------------------------------------------------------------------------------------------------- - - andeq r2, r0, r12, ror r4 -Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 0: 1| 1: 0: 0: 0| -------------------------------------------------------------------------------------------------- - - andeq r2, r0, r8, asr r4 -Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5) - 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------------------------------------------------------------------------------------------------- -| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 0: 0: 1| 0: 1: 0: 0| -------------------------------------------------------------------------------------------------- - - andeq r2, r0, r4, lsl r4 -da0603a-dhcp191:9131529 johnny$ + movs r5, r0 +[16:28:00] johnny:/Volumes/data/Radar/9131529 $ diff --git a/lldb/utils/test/disasm.py b/lldb/utils/test/disasm.py index 83b113147515..46660299f188 100755 --- a/lldb/utils/test/disasm.py +++ b/lldb/utils/test/disasm.py @@ -27,16 +27,26 @@ def which(program): return exe_file return None -def do_llvm_mc_disassembly(exe, func, mc, mc_options = None): +def do_llvm_mc_disassembly(gdb_commands, gdb_options, exe, func, mc, mc_options): from cStringIO import StringIO import pexpect gdb_prompt = "\r\n\(gdb\) " - gdb = pexpect.spawn('gdb %s' % exe) + gdb = pexpect.spawn(('gdb %s' % gdb_options) if gdb_options else 'gdb') # Turn on logging for what gdb sends back. gdb.logfile_read = sys.stdout - gdb.expect(gdb_prompt) + + # See if there any extra command(s) to execute before we issue the file command. + for cmd in gdb_commands: + gdb.sendline(cmd) + gdb.expect(gdb_prompt) + + # Now issue the file command. + gdb.sendline('file %s' % exe) + gdb.expect(gdb_prompt) + + # Send the disassemble command. gdb.sendline('disassemble %s' % func) gdb.expect(gdb_prompt) @@ -123,6 +133,14 @@ and display the disassembly result. Usage: %prog [options] """) + parser.add_option('-C', '--gdb-command', + type='string', action='append', metavar='COMMAND', + default=[], dest='gdb_commands', + help='Command(s) gdb executes after starting up (can be empty)') + parser.add_option('-O', '--gdb-options', + type='string', action='store', + dest='gdb_options', + help="""The options passed to 'gdb' command if specified.""") parser.add_option('-e', '--executable', type='string', action='store', dest='executable', @@ -140,10 +158,13 @@ Usage: %prog [options] parser.add_option('-o', '--options', type='string', action='store', dest='llvm_mc_options', - help="""The extra options passed to 'llvm-mc -disassemble' command if specified.""") + help="""The options passed to 'llvm-mc -disassemble' command if specified.""") opts, args = parser.parse_args() + gdb_commands = opts.gdb_commands + gdb_options = opts.gdb_options + if not opts.executable: parser.print_help() sys.exit(1) @@ -164,12 +185,14 @@ Usage: %prog [options] llvm_mc_options = opts.llvm_mc_options # We have parsed the options. + print "gdb commands:", gdb_commands + print "gdb options:", gdb_options print "executable:", executable print "function:", function print "llvm-mc:", llvm_mc print "llvm-mc options:", llvm_mc_options - do_llvm_mc_disassembly(executable, function, llvm_mc, llvm_mc_options) + do_llvm_mc_disassembly(gdb_commands, gdb_options, executable, function, llvm_mc, llvm_mc_options) if __name__ == '__main__': main()