From f410acbbd5cdfaeb34073f933dcd7ff7ae35306d Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Fri, 15 Oct 2010 23:07:10 +0000 Subject: [PATCH] Make sure offset is 0 for load/store register to the stack call. llvm-svn: 116640 --- llvm/lib/Target/ARM/ARMFastISel.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 901cb579fb14..cbfad2dace29 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -762,7 +762,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, assert((Base.Reg == ARM::SP || Offset == 0) && "Offset not zero and not a stack load!"); - if (Base.Reg == ARM::SP) + if (Base.Reg == ARM::SP && Offset == 0) TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, ResultReg, Base.FrameIndex, RC, TM.getRegisterInfo()); @@ -832,7 +832,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, break; } - if (Base.Reg == ARM::SP) + if (Base.Reg == ARM::SP && Offset == 0) TII.storeRegToStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, SrcReg, true /*isKill*/, Base.FrameIndex, TLI.getRegClassFor(VT), TM.getRegisterInfo());