Commit Graph

3927 Commits

Author SHA1 Message Date
Benjamin Kramer
dfb7b3fe02 [mlir][VectorOps] Fall back to a loop when accessing a vector from a strided memref
The scalar loop is slow but correct.

Differential Revision: https://reviews.llvm.org/D87082
2020-09-03 16:05:38 +02:00
Mehdi Amini
c0b6bc070e Decouple OpPassManager from the the MLIRContext (NFC)
This is allowing to build an OpPassManager from a StringRef instead of an
Identifier, which enables building pipelines without an MLIRContext.
An identifier is still cached on-demand on the OpPassManager for efficiency
during the IR traversal.
2020-09-03 06:02:05 +00:00
Jakub Lichman
8d35080ebb [mlir][Linalg] Wrong tile size for convolutions fixed
Sizes of tiles (subviews) are bigger by 1 than they should. Let's consider
1D convolution without batches or channels. Furthermore let m iterate over
the output and n over the kernel then input is accessed with m + n. In tiling
subview sizes for convolutions are computed by applying requested tile size
together with kernel size to the above mentioned expression thus let's say
for tile size of 2 the subview size is 2 + size(n), which is bigger by one
than it should since we move kernel only once. The problem behind it is that
range is not turned into closed interval before the composition. This commit
fixes the problem by turning ranges first into closed intervals by substracting
1 and after the composition back to half open by adding 1.

Differential Revision: https://reviews.llvm.org/D86638
2020-09-03 06:01:21 +00:00
Artur Bialas
d9b4245f56 [mlir][spirv] Add block read and write from SPV_INTEL_subgroups
Added support to OpSubgroupBlockReadINTEL and OpSubgroupBlockWriteINTEL

Differential Revision: https://reviews.llvm.org/D86876
2020-09-02 20:06:59 -07:00
Diego Caballero
46781630a3 [MLIR][Affine][VectorOps] Vectorize uniform values in SuperVectorizer
This patch adds basic support for vectorization of uniform values to SuperVectorizer.
For now, only invariant values to the target vector loops are considered uniform. This
enables the vectorization of loops that use function arguments and external definitions
to the vector loops. We could extend uniform support in the future if we implement some
kind of divergence analysis algorithm.

Reviewed By: nicolasvasilache, aartbik

Differential Revision: https://reviews.llvm.org/D86756
2020-09-03 01:17:06 +03:00
Mehdi Amini
1284dc34ab Use an Identifier instead of an OperationName internally for OpPassManager identification (NFC)
This allows to defers the check for traits to the execution instead of forcing it on the pipeline creation.
In particular, this is making our pipeline creation tolerant to dialects not being loaded in the context yet.

Reviewed By: rriddle, GMNGeoffrey

Differential Revision: https://reviews.llvm.org/D86915
2020-09-02 21:46:05 +00:00
Diego Caballero
553bfc8fa1 [mlir][Affine] Support affine vector loads/stores in LICM
Make use of affine memory op interfaces in AffineLoopInvariantCodeMotion so
that it can also work on affine.vector_load and affine.vector_store ops.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D86986
2020-09-03 00:43:24 +03:00
Diego Caballero
65f20ea113 [mlir][Affine] Fix AffineLoopInvariantCodeMotion
Make sure that memory ops that are defined inside the loop are registered
as such in 'defineOp'. In the test provided, the 'mulf' op was hoisted
outside the loop nest even when its 'affine.load' operand was not.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D86982
2020-09-03 00:06:41 +03:00
Mehdi Amini
01700c45eb Store an Identifier instead of a StringRef for the OperationName inside an AbstractOperation (NFC)
Instead of storing a StringRef, we keep an Identifier which otherwise requires a lock on the context to retrieve.
This will allow to get an Identifier for any registered Operation for "free".

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86994
2020-09-02 19:10:56 +00:00
Ehsan Toosi
39cf83cc78 [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks
In this PR, the users of BufferPlacement can configure
BufferAssginmentTypeConverter. These new configurations would give the user more
freedom in the process of converting function signature, and return and call
operation conversions.

These are the new features:
    - Accepting callback functions for decomposing types (i.e. 1 to N type
    conversion such as unpacking tuple types).
    - Defining ResultConversionKind for specifying whether a function result
    with a certain type should be appended to the function arguments list or
    should be kept as function result. (Usage:
    converter.setResultConversionKind<MemRefType>(AppendToArgumentList))
    - Accepting callback functions for composing or decomposing values (i.e. N
    to 1 and 1 to N value conversion).

Differential Revision: https://reviews.llvm.org/D85133
2020-09-02 17:53:42 +02:00
Lei Zhang
1b88bbf5eb Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks"
This reverts commit 94f5d24877 because
of failing the following tests:

MLIR :: Dialect/Linalg/tensors-to-buffers.mlir
MLIR :: Transforms/buffer-placement-preparation-allowed-memref-results.mlir
MLIR :: Transforms/buffer-placement-preparation.mlir
2020-09-02 09:24:36 -04:00
Jakub Lichman
f5ed22f09d [mlir][VectorToSCF] 128 byte alignment of alloc ops
Added 128 byte alignment to alloc ops created in VectorToSCF pass.
128b alignment was already introduced to this pass but not to all alloc
ops. This commit changes that by adding 128b alignment to the remaining ops.
The point of specifying alignment is to prevent possible memory alignment errors
on weakly tested architectures.

Differential Revision: https://reviews.llvm.org/D86454
2020-09-02 12:37:35 +00:00
Ehsan Toosi
94f5d24877 [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks
In this PR, the users of BufferPlacement can configure
BufferAssginmentTypeConverter. These new configurations would give the user more
freedom in the process of converting function signature, and return and call
operation conversions.

These are the new features:
    - Accepting callback functions for decomposing types (i.e. 1 to N type
    conversion such as unpacking tuple types).
    - Defining ResultConversionKind for specifying whether a function result
    with a certain type should be appended to the function arguments list or
    should be kept as function result. (Usage:
    converter.setResultConversionKind<MemRefType>(AppendToArgumentList))
    - Accepting callback functions for composing or decomposing values (i.e. N
    to 1 and 1 to N value conversion).

Differential Revision: https://reviews.llvm.org/D85133
2020-09-02 13:26:55 +02:00
Benjamin Kramer
2bf491c729 [mlir][VectorOps] Fail fast when a strided memref is passed to vector_transfer
Otherwise we'll silently miscompile things.

Differential Revision: https://reviews.llvm.org/D86951
2020-09-02 10:34:36 +02:00
ZHANG Hongbin
1d99472875 [mlir] Add Complex Type, Vector Type and Tuple Type subclasses to python bindings
Based on the PyType and PyConcreteType classes, this patch implements the bindings of Complex Type, Vector Type and Tuple Type subclasses.
For the convenience of type checking, this patch defines a `mlirTypeIsAIntegerOrFloat` function to check whether the given type is an integer or float type.
These three subclasses in this patch have similar binding strategy:
- The function pointer `isaFunction` points to `mlirTypeIsA***`.
- The `mlir***TypeGet` C API is bound with the `get_***` method in the python side.
- The Complex Type and Vector Type check whether the given type is an integer or float type.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D86785
2020-09-02 05:46:00 +00:00
River Riddle
431bb8b318 [mlir][ODS] Use c++ types for integer attributes of fixed width when possible.
Unsigned and Signless attributes use uintN_t and signed attributes use intN_t, where N is the fixed width. The 1-bit variants use bool.

Differential Revision: https://reviews.llvm.org/D86739
2020-09-01 13:43:32 -07:00
Valentin Clement
2bbbcae782 [mlir][openacc] Add missing attributes and operands for acc.loop
This patch add the missing operands to the acc.loop operation. Only the device_type
information is not part of the operation for now.

Reviewed By: rriddle, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D86753
2020-08-31 19:50:05 -04:00
Mehdi Amini
f54914081f Fix mlir-reduce to explicitly register dialects and disable the global dialect registry by default
Clients who rely on the Context loading dialects from the global
registry can call `mlir::enableGlobalDialectRegistry(true);` before
creating an MLIRContext

Differential Revision: https://reviews.llvm.org/D86897
2020-08-31 22:54:58 +00:00
River Riddle
2481846a30 [mlir][PDL] Move the formats for PatternOp and RewriteOp to the declarative form.
This is possible now that the declarative assembly form supports regions.

Differential Revision: https://reviews.llvm.org/D86830
2020-08-31 13:26:24 -07:00
River Riddle
eaeadce9bd [mlir][OpFormatGen] Add initial support for regions in the custom op assembly format
This adds some initial support for regions and does not support formatting the specific arguments of a region. For now this can be achieved by using a custom directive that formats the arguments and then parses the region.

Differential Revision: https://reviews.llvm.org/D86760
2020-08-31 13:26:24 -07:00
Kamlesh Kumar
deb99610ab Improve doc comments for several methods returning bools
Differential Revision: https://reviews.llvm.org/D86848
2020-08-30 13:33:05 +05:30
Mehdi Amini
9f2fbfab8d Use report_fatal_error instead of llvm::errs() + abort() (NFC)
This is making the error reporting in line with other fatal errors.
2020-08-29 00:36:08 +00:00
Stella Laurenzo
2d1362e09a Add Location, Region and Block to MLIR Python bindings.
* This is just enough to create regions/blocks and iterate over them.
* Does not yet implement the preferred iteration strategy (python pseudo containers).
* Refinements need to come after doing basic mappings of operations and values so that the whole hierarchy can be used.

Differential Revision: https://reviews.llvm.org/D86683
2020-08-28 15:26:05 -07:00
Mehdi Amini
c39c21610d Rename AnalysisManager::slice in AnalysisManager::nest (NFC)
The naming wasn't reflecting the intent of this API, "nest" is aligning
it with the pass manager API.
2020-08-28 20:41:07 +00:00
Benjamin Kramer
8782c72765 Strength-reduce SmallVectors to arrays. NFCI. 2020-08-28 21:14:20 +02:00
David Sherwood
d761e456ce Fix more build failures caused by f4257c5832
MLIR build failed after ElementCount refactoring - updated code to
call isScalable() and getKnownMinValue().
2020-08-28 15:08:59 +01:00
David Sherwood
4b1a55a92f Fix build failures caused by f4257c5832 2020-08-28 14:56:01 +01:00
Hanhan Wang
eb4efa8832 [mlir][Linalg] Enhance Linalg fusion on generic op and tensor_reshape op.
The tensor_reshape op was only fusible only if it is a collapsing case. Now we
propagate the op to all the operands so there is a further chance to fuse it
with generic op. The pre-conditions are:

1) The producer is not an indexed_generic op.
2) All the shapes of the operands are the same.
3) All the indexing maps are identity.
4) All the loops are parallel loops.
5) The producer has a single user.

It is possible to fuse the ops if the producer is an indexed_generic op. We
still can compute the original indices. E.g., if the reshape op collapses the d0
and d1, we can use DimOp to get the width of d1, and calculate the index
`d0 * width + d1`. Then replace all the uses with it. However, this pattern is
not implemented in the patch.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86314
2020-08-28 01:55:49 -07:00
Mehdi Amini
7b00c80888 Add a global flag to disable the global dialect registry "process wise"
This is intended to ease the transition for client with a lot of
dependencies. It'll be removed in the coming weeks.

Differential Revision: https://reviews.llvm.org/D86755
2020-08-28 03:17:15 +00:00
Vincent Zhao
28a7dfa33d [MLIR] Fixed missing constraint append when adding an AffineIfOp domain
The prior diff that introduced `addAffineIfOpDomain` missed appending
constraints from the ifOp domain. This revision fixes this problem.

Differential Revision: https://reviews.llvm.org/D86421
2020-08-28 00:34:23 +05:30
Kiran Chandramohan
875074c8a9 [OpenMP][MLIR] Conversion pattern for OpenMP to LLVM
Adding a conversion pattern for the parallel Operation. This will
help the conversion of parallel operation with standard dialect to
parallel operation with llvm dialect. The type conversion of the block
arguments in a parallel region are controlled by the pattern for the
parallel Operation. Without this pattern, a parallel Operation with
block arguments cannot be converted from standard to LLVM dialect.
Other OpenMP operations without regions are marked as legal. When
translation of OpenMP operations with regions are added then patterns
for these operations can also be added.
Also uses all the standard to llvm patterns. Patterns of other dialects
can be added later if needed.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86273
2020-08-27 19:32:15 +01:00
Benjamin Kramer
fddf543e6e [MLIR][GPUToSPIRV] Fix use-after-free. Found by asan. 2020-08-27 17:57:11 +02:00
Alexandre E. Eichenberger
a14a2805b0 [MLIR] MemRef Normalization for Dialects
When dealing with dialects that will results in function calls to
external libraries, it is important to be able to handle maps as some
dialects may require mapped data.  Before this patch, the detection of
whether normalization can apply or not, operations are compared to an
explicit list of operations (`alloc`, `dealloc`, `return`) or to the
presence of specific operation interfaces (`AffineReadOpInterface`,
`AffineWriteOpInterface`, `AffineDMAStartOp`, or `AffineDMAWaitOp`).

This patch add a trait, `MemRefsNormalizable` to determine if an
operation can have its `memrefs` normalized.

This trait can be used in turn by dialects to assert that such
operations are compatible with normalization of `memrefs` with
nontrivial memory layout specification. An example is given in the
literal tests.

Differential Revision: https://reviews.llvm.org/D86236
2020-08-27 20:26:59 +05:30
George Mitenkov
d48b84eb8a [MLIR][GPUToSPIRV] Passing gpu module name to SPIR-V module
This patch allows to pass the gpu module name to SPIR-V
module during conversion. This has many benefits as we can lookup
converted to SPIR-V kernel in the symbol table.

In order to avoid symbol conflicts, `"__spv__"` is added to the
gpu module name to form the new one.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86384
2020-08-27 09:19:24 +03:00
George Mitenkov
e850558cdc [MLIR][SPIRVToLLVM] Added a hook for descriptor set / binding encoding
This patch introduces a hook to encode descriptor set
and binding number into `spv.globalVariable`'s symbolic name. This
allows to preserve this information, and at the same time legalize
the global variable for the conversion to LLVM dialect.

This is required for `mlir-spirv-cpu-runner` to convert kernel
arguments into LLVM.

Also, a couple of some nits added:
- removed unused comment
- changed to a capital letter in the comment

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86515
2020-08-27 08:27:42 +03:00
Mehdi Amini
6c05ca21b9 Remove the run method from OpPassManager and Pass and migrate it to OpToOpPassAdaptor
This makes OpPassManager more of a "container" of passes and not responsible to drive the execution.
As such we also make it constructible publicly, which will allow to build arbitrary pipeline decoupled from the execution. We'll make use of this facility to expose "dynamic pipeline" in the future.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86391
2020-08-27 04:57:29 +00:00
George Mitenkov
d7461b31e7 [MLIR][SPIRV] Added optional name to SPIR-V module
This patch adds an optional name to SPIR-V module.
This will help with lowering from GPU dialect (so that we
can pass the kernel module name) and will be more naturally
aligned with `GPUModuleOp`/`ModuleOp`.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86386
2020-08-27 07:32:31 +03:00
Thomas Raoux
5fbfe2ec4f [mlir][vector] Add vector.bitcast operation
Based on the RFC discussed here:
https://llvm.discourse.group/t/rfc-vector-standard-add-bitcast-operation/1628/

Adding a vector.bitcast operation that allows casting to a vector of different
element type. The most minor dimension bitwidth must stay unchanged.

Differential Revision: https://reviews.llvm.org/D86580
2020-08-26 14:13:52 -07:00
River Riddle
d289a97f91 [mlir][PDL] Add a PDL Interpreter Dialect
The PDL Interpreter dialect provides a lower level abstraction compared to the PDL dialect, and is targeted towards low level optimization and interpreter code generation. The dialect operations encapsulates low-level pattern match and rewrite "primitives", such as navigating the IR (Operation::getOperand), creating new operations (OpBuilder::create), etc. Many of the operations within this dialect also fuse branching control flow with some form of a predicate comparison operation. This type of fusion reduces the amount of work that an interpreter must do when executing.

An example of this representation is shown below:

```mlir
// The following high level PDL pattern:
pdl.pattern : benefit(1) {
  %resultType = pdl.type
  %inputOperand = pdl.input
  %root, %results = pdl.operation "foo.op"(%inputOperand) -> %resultType
  pdl.rewrite %root {
    pdl.replace %root with (%inputOperand)
  }
}

// May be represented in the interpreter dialect as follows:
module {
  func @matcher(%arg0: !pdl.operation) {
    pdl_interp.check_operation_name of %arg0 is "foo.op" -> ^bb2, ^bb1
  ^bb1:
    pdl_interp.return
  ^bb2:
    pdl_interp.check_operand_count of %arg0 is 1 -> ^bb3, ^bb1
  ^bb3:
    pdl_interp.check_result_count of %arg0 is 1 -> ^bb4, ^bb1
  ^bb4:
    %0 = pdl_interp.get_operand 0 of %arg0
    pdl_interp.is_not_null %0 : !pdl.value -> ^bb5, ^bb1
  ^bb5:
    %1 = pdl_interp.get_result 0 of %arg0
    pdl_interp.is_not_null %1 : !pdl.value -> ^bb6, ^bb1
  ^bb6:
    pdl_interp.record_match @rewriters::@rewriter(%0, %arg0 : !pdl.value, !pdl.operation) : benefit(1), loc([%arg0]), root("foo.op") -> ^bb1
  }
  module @rewriters {
    func @rewriter(%arg0: !pdl.value, %arg1: !pdl.operation) {
      pdl_interp.replace %arg1 with(%arg0)
      pdl_interp.return
    }
  }
}
```

Differential Revision: https://reviews.llvm.org/D84579
2020-08-26 05:22:27 -07:00
River Riddle
474f7639e3 [mlir] Fix bug in block merging when the types of the operands differ
The merging algorithm was previously not checking for type equivalence.

Fixes PR47314

Differential Revision: https://reviews.llvm.org/D86594
2020-08-26 01:17:20 -07:00
Thomas Raoux
6a3c69e918 [mlir][spirv] Infer converted type of scf.for from the init value
Instead of using the TypeConverter infer the value of the alloca created based
on the init value. This will allow some ambiguous types like multidimensional
vectors to be converted correctly.

Differential Revision: https://reviews.llvm.org/D86582
2020-08-25 23:35:01 -07:00
Mehdi Amini
49c371b319 Add llvm_unreachable after fully covered switch to silence some warnings from GCC (NFC) 2020-08-25 23:09:11 +00:00
zhanghb97
1f6c4d829c [mlir] Add Index Type, Floating Point Type and None Type subclasses to python bindings.
Based on the PyType and PyConcreteType classes, this patch implements the bindings of Index Type, Floating Point Type and None Type subclasses.
These three subclasses share the same binding strategy:
- The function pointer `isaFunction` points to `mlirTypeIsA***`.
- The `mlir***TypeGet` C API is bound with the `***Type` constructor in the python side.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D86466
2020-08-24 18:54:54 +00:00
Mehdi Amini
610706906a Add an assertion to protect against missing Dialect registration in a pass pipeline (NFC)
Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86327
2020-08-24 06:49:29 +00:00
Stella Laurenzo
3137c29926 Add initial python bindings for attributes.
* Generic mlir.ir.Attribute class.
* First standard attribute (mlir.ir.StringAttr), following the same pattern as generic vs standard types.
* NamedAttribute class.

Differential Revision: https://reviews.llvm.org/D86250
2020-08-23 22:16:23 -07:00
Mehdi Amini
f164534ca8 Add a dialect_registration callback for "translations" registered with mlir-translate
This will allow out-of-tree translation to register the dialects they expect
to see in their input, on the model of getDependentDialects() for passes.

Differential Revision: https://reviews.llvm.org/D86409
2020-08-23 01:00:39 +00:00
Mehdi Amini
96cb8cdeb0 Refactor mlir-translate to extract the main() logic in a helper on the model of MlirOptMain() (NFC)
Differential Revision: https://reviews.llvm.org/D86408
2020-08-23 01:00:31 +00:00
Mehdi Amini
12541b5ed5 Use TranslateFromMLIRRegistration for SPIRV roundtrip (NFC)
This is aligning it with the other "translation" which operates on a MLIR input.
2020-08-23 00:40:50 +00:00
Aden Grue
670063eb22 Preserve the error message when MemoryBuffer creation fails
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D86326
2020-08-21 18:03:25 +00:00
Thomas Raoux
36ee9a322a [mlir][GPUToVulkan] Fix signature of bindMemRef function for f16
Binding MemRefs of f16 needs special handling as the type is not supported on
CPU. There was a bug in the type used.

Differential Revision: https://reviews.llvm.org/D86328
2020-08-21 10:48:00 -07:00