Commit Graph

5349 Commits

Author SHA1 Message Date
thomasraoux
b2e72cd38d [mlir][spirv] Support conversion of extract op from vector<1xT> type
Differential Revision: https://reviews.llvm.org/D100814
2021-04-20 09:11:41 -07:00
Hanhan Wang
7b7df8e85e [mlir][StandardToSPIRV] Add support for lowering std.xor on bool to SPIR-V
std.xor ops on bool are lowered to spv.LogicalNotEqual. For Boolean values, xor
and not-equal are the same thing.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100817
2021-04-20 07:35:20 -07:00
Tobias Gysi
b9715156ff [mlir][linalg] lower index operations during linalg to vector lowering.
The patch extends the vectorization pass to lower linalg index operations to vector code. It allocates constant 1d vectors that enumerate the indexes along the iteration dimensions and broadcasts/transposes these 1d vectors to the iteration space.

Differential Revision: https://reviews.llvm.org/D100373
2021-04-20 11:55:44 +00:00
Matthias Springer
7cc8106f67 [mlir] Progressively lower vector to SCF
Add a new ProgressiveVectorToSCF pass that lowers vector transfer ops to SCF by gradually unpacking one dimension at time. Unpacking stops at 1D, but can be configured to stop earlier, should the HW support (N>1)-d vectors.

The current implementation cannot handle permutation maps, masks, tensor types and unrolling yet. These will be added in subsequent commits. Once features are on par with VectorToSCF, this implementation will replace VectorToSCF.

Differential Revision: https://reviews.llvm.org/D100622
2021-04-20 18:49:36 +09:00
Tres Popp
34810e1b9c [mlir] Add patterns to lower Math operations to LLVM based libm calls.
Some Math operations do not have an equivalent in LLVM. In these cases,
allow a low priority fallback of calling the libm functions. This is to
give functionality and is not a performant option.

Differential Revision: https://reviews.llvm.org/D100367
2021-04-20 11:38:55 +02:00
KareemErgawy-TomTom
0b05207e45 [MLIR][LinAlg] Detensoring CF cost-model: look forward.
This patch extends the control-flow cost-model for detensoring by
implementing a forward-looking pass on block arguments that should be
detensored. This makes sure that if a (to-be-detensored) block argument
"escapes" its block through the terminator, then the successor arguments
are also detensored.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D100457
2021-04-20 09:01:43 +02:00
Tobias Gysi
39a604e3df [mlir][linalg] update fusion on tensors to support linalg index operations.
The patch replaces the index operations in the body of fused producers and linearizes the indices after expansion.

Differential Revision: https://reviews.llvm.org/D100479
2021-04-20 06:13:04 +00:00
Tobias Gysi
d0774f7f0a [mlir][linalg] update drop unit dims to support linalg index operations.
Update the dimensions of the index operations to account for dropped dimensions and replace the index operations of dropped dimensions by zero.

Differential Revision: https://reviews.llvm.org/D100395
2021-04-20 04:54:00 +00:00
clementval
c46a88625d [mlir][llvm] Add UnnamedAddr attribute to GlobalOp
This patch add the UnnamedAddr attribute for the GlobalOp in the LLVM
dialect. The attribute is also handled to and from LLVM IR.

This is meant to be used in a follow up patch to lower OpenACC/OpenMP ops to
call to kmp and tgt runtime calls (D100678).

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D100677
2021-04-19 21:45:14 -04:00
Nicolas Vasilache
1dc533cea4 [mlir][python] ExecutionEngine can dump to object file
Differential Revision: https://reviews.llvm.org/D100786
2021-04-19 19:33:27 +00:00
Tobias Gysi
27ad213680 [mlir][linalg] enable library call rewrites for linalg operations with index semantics.
The patch enables the library call lowering for linalg operations that contain index operations.

Differential Revision: https://reviews.llvm.org/D100537
2021-04-19 12:50:59 +00:00
Alex Zinenko
4acd8457d8 [mlir] Improve debug flag management in Python bindings
Expose the debug flag as a readable and assignable property of a
dedicated class instead of a write-only function. Actually test the fact
of setting the flag. Move test to a dedicated file, it has zero relation
to context_managers.py where it was added.

Arguably, it should be promoted from mlir.ir to mlir module, but we are
not re-exporting the latter and this functionality is purposefully
hidden so can stay in IR for now. Drop unnecessary export code.

Refactor C API and put Debug into a separate library, fix it to actually
set the flag to the given value.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D100757
2021-04-19 14:45:43 +02:00
Tobias Gysi
495e1d7e8a [mlir][linalg] adding pass to run the interchange pattern.
Instead of interchanging loops during the loop lowering this pass performs the interchange by permuting the indexing maps. It also updates the iterator types and the index accesses in the body of the operation.

Differential Revision: https://reviews.llvm.org/D100627
2021-04-19 12:19:15 +00:00
Tres Popp
31686d13dc Add default DataLayout support for complex numbers
Differential Revision: https://reviews.llvm.org/D100289
2021-04-19 11:36:12 +02:00
Nicolas Vasilache
843f1fc825 [mlir][scf] Add scf.for + tensor.cast canonicalization pattern
Fold scf.for iter_arg/result pairs that go through incoming/ougoing
a tensor.cast op pair so as to pull the tensor.cast inside the scf.for:

```
  %0 = tensor.cast %t0 : tensor<32x1024xf32> to tensor<?x?xf32>
  %1 = scf.for %i = %c0 to %c1024 step %c32 iter_args(%iter_t0 = %0)
     -> (tensor<?x?xf32>) {
    %2 = call @do(%iter_t0) : (tensor<?x?xf32>) -> tensor<?x?xf32>
    scf.yield %2 : tensor<?x?xf32>
  }
  %2 = tensor.cast %1 : tensor<?x?xf32> to tensor<32x1024xf32>
  use_of(%2)
```

folds into:

```
  %0 = scf.for %arg2 = %c0 to %c1024 step %c32 iter_args(%arg3 = %arg0)
      -> (tensor<32x1024xf32>) {
    %2 = tensor.cast %arg3 : tensor<32x1024xf32> to tensor<?x?xf32>
    %3 = call @do(%2) : (tensor<?x?xf32>) -> tensor<?x?xf32>
    %4 = tensor.cast %3 : tensor<?x?xf32> to tensor<32x1024xf32>
    scf.yield %4 : tensor<32x1024xf32>
  }
  use_of(%0)
```

Differential Revision: https://reviews.llvm.org/D100661
2021-04-16 16:50:21 +00:00
thomasraoux
3fc0fbefc8 [mlir][vector] Move transferOp on tensor opt to folder/canonicalization
Move the existing optimization for transfer op on tensor to folder and
canonicalization. This handles the write after write case and read after write
and also add write after read case.

Differential Revision: https://reviews.llvm.org/D100597
2021-04-16 08:13:10 -07:00
Mats Petersson
517c3aee4d [OpenMP IRBuilder, MLIR] Add support for OpenMP do schedule dynamic
The implementation supports static schedule for Fortran do loops. This
implements the dynamic variant of the same concept.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D97393
2021-04-16 16:09:49 +01:00
Javier Setoain
b739bada9d [mlir][ArmSVE] Cleanup dialect registration
ArmSVE dialect is behind the recent changes in how the Vector dialect
interacts with backend vector dialects and the MLIR -> LLVM IR
translation module. This patch cleans up ArmSVE initialization within
Vector and removes the need for an LLVMArmSVE dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D100171
2021-04-16 15:56:51 +02:00
Nicolas Vasilache
caa159f044 [mlir][python] Add simple debugging and printing helpers
Differential Revision: https://reviews.llvm.org/D100643
2021-04-16 13:47:46 +00:00
Frederik Gossen
c2c65585c5 [MLIR] Fix isValidIndex
Differential Revision: https://reviews.llvm.org/D100635
2021-04-16 14:58:54 +02:00
Frederik Gossen
3a5a610e27 [MLIR][Shape] Expose getShapeVec and add support for extent tensors
Differential Revision: https://reviews.llvm.org/D100636
2021-04-16 13:59:20 +02:00
Nicolas Vasilache
b5f3a128bf [mlir][Python][Linalg] Add support for captures in body builder.
When Linalg named ops support was added, captures were omitted
from the body builder. This revision adds support for captures
which allows us to write FillOp in a more idiomatic fashion using
the _linalg_ops_ext mixin support.

This raises an issue in the generation of `_linalg_ops_gen.py` where
```
  @property
  def result(self):
    return self.operation.results[0] if len(self.operation.results) > 1 else None
```.
The condition should be `== 1`.

This will be fixed in a separate commit.

Differential Revision: https://reviews.llvm.org/D100363
2021-04-16 08:47:26 +00:00
Nicolas Vasilache
8cf650c554 [mlir][linalg] Add support for WAW fusion on tensors.
Differential Revision: https://reviews.llvm.org/D100603
2021-04-16 08:22:09 +00:00
Ahmed Taei
0e2f9b61fd Fix tile-and-pad when padding doesn't span all dimension
Without this tile-and-pad will never terminate if pad-fails.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D97720
2021-04-15 20:17:40 -07:00
Prashant Kumar
102fd1cb8b Add support for numpy arrays to memref conversions.
This offers the ability to pass numpy arrays to the corresponding
memref argument.

Reviewed By: mehdi_amini, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D100077
2021-04-15 23:41:26 +00:00
River Riddle
706c9c5ce0 [mlir] Add support for walking locations similarly to Operations
This allows for walking all nested locations of a given location, and is generally useful when processing locations.

Differential Revision: https://reviews.llvm.org/D100437
2021-04-15 16:09:34 -07:00
River Riddle
4efb7754e0 [mlir][NFC] Add a using directive for llvm::SetVector
Differential Revision: https://reviews.llvm.org/D100436
2021-04-15 16:09:34 -07:00
Aart Bik
916f3e16bd [mlir][vector][avx] add AVX dot product to X86Vector dialect with lowering
In the long run, we want to unify the dot product codegen solutions between
all target architectures, but this intrinsic enables experimenting with AVX
specific implementations in the meantime.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D100593
2021-04-15 15:01:39 -07:00
River Riddle
b1260109fb [mlir][AsmPrinter] Fix multi-threaded segfault by using explicit null stream per thread
We were using llvm::nulls, but that isn't thread safe so we switch to giving each thread it's own null stream.

Differential Revision: https://reviews.llvm.org/D100578
2021-04-15 12:26:59 -07:00
Alexander Belyaev
cf761904a2 [mlir] Add verification for linalg.tiled_loop op.
Differential Revision: https://reviews.llvm.org/D100555
2021-04-15 20:50:36 +02:00
Alexander Belyaev
67f60bcc75 [mlir] Expose updateBoundsForCyclicDistribution in Linalg/Utils.h.
Differential Revision: https://reviews.llvm.org/D100580
2021-04-15 20:47:37 +02:00
River Riddle
94662ee0c1 [mlir] Add support for adding attribute+type traits/interfaces to tablegen defs
This matches the current support provided to operations, and allows attaching traits, interfaces, and using the DeclareInterfaceMethods utility. This was missed when attribute/type generation was first added.

Differential Revision: https://reviews.llvm.org/D100233
2021-04-15 11:41:51 -07:00
Aart Bik
92b0a9d7d4 [mlir][sparse] remove restriction on vectorization of index type
Rationale:
Now that vector<?xindex> is allowed, the restriction on vectorization
of index types in the sparse compiler can be removed. Also needs
generalization of scatter/gather index types.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D100522
2021-04-15 10:27:04 -07:00
Chia-hung Duan
6b0cef3e02 Refactor the architecture of mlir-reduce
Add iterator for ReductionNode traversal and use range to indicate the
region we would like to keep. Refactor the interaction between
Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D99713
2021-04-14 13:40:44 -07:00
Mehdi Amini
a33b647100 Revert "Refactor the architecture of mlir-reduce"
This reverts commit a32846b1d0.

The build is broken with -DBUILD_SHARED_LIBS=ON:

tools/mlir/lib/Reducer/CMakeFiles/obj.MLIRReduce.dir/Tester.cpp.o: In function `mlir::Tester::isInteresting(mlir::ModuleOp) const':
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xa8): undefined reference to `mlir::OpPrintingFlags::OpPrintingFlags()'
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xc6): undefined reference to `mlir::Operation::print(llvm::raw_ostream&, mlir::OpPrintingFlags)'
2021-04-14 19:25:43 +00:00
Jacques Pienaar
a32846b1d0 Refactor the architecture of mlir-reduce
Add iterator for ReductionNode traversal and use range to indicate the region we would like to keep. Refactor the interaction between Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D99713
2021-04-14 10:16:30 -07:00
Tobias Gysi
ce82843f72 [mlir][linalg] update fusion to support linalg index operations.
The patch updates the linalg fusion pass to add the tile offsets to the indices.

Differential Revision: https://reviews.llvm.org/D100456
2021-04-14 15:32:42 +00:00
Hanhan Wang
7c4de2e9b9 [mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100452
2021-04-14 07:22:49 -07:00
Tres Popp
d80178f7c1 [mlir] Change verification order to prevent null dereference
Differential Revision: https://reviews.llvm.org/D100390
2021-04-14 09:33:17 +02:00
Hanhan Wang
d9b03ef2e8 [mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V.
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100403
2021-04-13 22:36:47 -07:00
Mehdi Amini
597207a3c3 Expose parseXInDimensionList() to the DialectAsmParser
This allows custom types and attribute to parse a dimension list that
isn't necessarily terminated with `xtype`, for example something like:

#tf.shape<4x5>

Differential Revision: https://reviews.llvm.org/D100432
2021-04-14 02:07:34 +00:00
Arjun P
eff067440e [MLIR] PresburgerSet subtraction: add documentation and assertion saying we don't support divisions yet
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D100324
2021-04-14 05:56:35 +05:30
Sumesh Udayakumaran
f56791ae2e [mlir] Prevent operations with users from being hoisted
This patch collects operations that have users in a for loop and uses
them  when loop invariant operations are detected and hoisted.

Reviewed By: bondhugula, vinayaka-polymage

Differential Revision: https://reviews.llvm.org/D99761
2021-04-13 15:29:17 -07:00
Rob Suderman
7e1fb9a0d2 [mlir][tosa] Add conv2d lowering to linalg.conv2d operator for FP
Handles lowering conv2d to linalg's convolution operator. This implementation
only supports floating point values but handles all strides, dilations, and
padding values.

Differential Revision: https://reviews.llvm.org/D100061
2021-04-13 13:26:02 -07:00
Lei Zhang
5b15fe9334 [mlir][spirv] Only attach struct offset for required storage classes
Per the SPIR-V spec "2.16.2. Validation Rules for Shader Capabilities":

  Composite objects in the StorageBuffer, PhysicalStorageBuffer,
  Uniform, and PushConstant Storage Classes must be explicitly
  laid out.

For other cases we don't need to attach the struct offsets.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D100386
2021-04-13 15:30:30 -04:00
Eugene Zhulenev
8a316b00d6 [mlir] Convert async dialect passes from function passes to op agnostic passes
Differential Revision: https://reviews.llvm.org/D100401
2021-04-13 11:46:00 -07:00
Emilio Cota
0b63e3222b [mlir] X86Vector: Add AVX Rsqrt
Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D99818
2021-04-13 08:43:48 -07:00
Tobias Gysi
8ea5d190ec [mlir][linalg] update tiling to support linalg index operations.
The patch updates the tiling pass to add the tile offsets to the indices returned by the linalg operations.

Differential Revision: https://reviews.llvm.org/D100379
2021-04-13 14:36:01 +00:00
Butygin
eb31540066 [mlir] Canonicalize single-iteration ParallelOp
Differential Revision: https://reviews.llvm.org/D100248
2021-04-13 13:42:19 +03:00
Tobias Gysi
ef30179eff [mlir][linalg] lower index operations during linalg to loop lowering.
The patch extends the linalg to loop lowering pass to replace all linalg index operations by the induction variables of the generated loop nests.

Differential Revision: https://reviews.llvm.org/D100364
2021-04-13 09:04:09 +00:00