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llvm/mlir/test/Conversion
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Durgadoss R 8af88a45ca [MLIR][NVVM] Update PMEvent lowering to intrinsics (#171649) 
The patch updates the lowering of `id` based pmevent
also to intrinsics. The mask is simply (1 << event-id).

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2025-12-11 16:28:12 +05:30
..
AffineToStandard
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AMDGPUToROCDL
Reland [mlir][amdgpu] Add common gpu mem space conversions to convert-amdgpu-to-rocdl (#171599)
2025-12-10 17:33:51 +03:00
ArithToAMDGPU
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ArithToApfloat
[mlir][arith] arith-to-apfloat: Add vector support (#171024)
2025-12-07 20:55:48 +01:00
ArithToArmSME
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ArithToEmitC
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ArithToLLVM
[mlir][arith] Fix arith.cmpf lowering with unsupported FP types (#166684)
2025-11-28 03:01:14 +00:00
ArithToSPIRV
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ArmSMEToLLVM
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ArmSMEToSCF
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AsyncToLLVM
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BufferizationToMemRef
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ComplexToLibm
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ComplexToLLVM
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ComplexToROCDLLibraryCalls
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ComplexToSPIRV
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ComplexToStandard
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ControlFlowToLLVM
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ControlFlowToSCF
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ControlFlowToSPIRV
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ConvertToEmitC
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ConvertToSPIRV
[MLIR][Affine] Extend getVectorReductionOp to support xor/maxnumf/minnumf (#163310)
2025-11-04 12:52:51 +08:00
FuncToEmitC
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FuncToLLVM
[mlir][LLVM] Resync memory effect attribute with LLVM IR (#168568)
2025-11-19 11:56:04 -05:00
FuncToSPIRV
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GPUCommon
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GPUToLLVMSPV
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GPUToNVVM
[MLIR][GPU] subgroup_mma fp64 extension - take 2 (#169061)
2025-12-01 07:39:59 -05:00
GPUToROCDL
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GPUToSPIRV
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IndexToLLVM
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IndexToSPIRV
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LLVMCommon
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MathToEmitC
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MathToFuncs
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MathToLibm
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MathToLLVM
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MathToROCDL
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MathToSPIRV
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MathToVCIX
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MathToXeVM
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MemRefToEmitC
[mlir][emitc] Add address-of and dereference ops (#72569)
2025-12-03 12:41:29 +02:00
MemRefToLLVM
[MLIR] Fix FileCheck annotations and add 32-bit coverage (#167149)
2025-11-09 00:39:08 +00:00
MemRefToSPIRV
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MPIToLLVM
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NVGPUToNVVM
[MLIR][NVVM] Update mbarrier Ops to use AnyTypeOf[] (3/3) (#167567)
2025-11-12 16:07:57 +05:30
NVVMToLLVM
[MLIR][NVVM] Update PMEvent lowering to intrinsics (#171649)
2025-12-11 16:28:12 +05:30
OpenACCToSCF
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OpenMPToLLVM
[mlir][OpenMP] Fix crash in MapInfoOp conversion when type conversion fails (#171045)
2025-12-08 17:30:22 +01:00
PDLToPDLInterp
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PtrToLLVM
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ReconcileUnrealizedCasts
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SCFToControlFlow
[mlir][SCF] Add pass option to deactivate pattern rollback (#168481)
2025-11-18 16:08:27 +08:00
SCFToEmitC
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SCFToGPU
[MLIR][SCFToGPU] Guard operands before AffineApplyOp::create to avoid crash (#167959)
2025-11-20 22:20:34 +08:00
SCFToOpenMP
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SCFToSPIRV
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ShapeToStandard
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ShardToMPI
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SPIRVToLLVM
[MLIR][SPIRV] Lower SPIR-V Tan/Tanh ops to LLVM intrinsics (#168419)
2025-11-18 06:31:46 -05:00
TensorToLinalg
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TensorToSPIRV
[MLIR][Spirv] Don't lower tensors that can't be represented by an ArrayType (#171002)
2025-12-08 13:44:22 -05:00
TosaToArith
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TosaToLinalg
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TosaToMLProgram
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TosaToSCF
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TosaToTensor
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UBToLLVM
[mlir][UB] Add ub.unreachable operation (#169872)
2025-11-28 10:35:18 +00:00
UBToSPIRV
[mlir][SPIRV] Improve ub.unreachable lowering test case (#170083)
2025-12-01 08:15:15 +00:00
VectorToAMX
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VectorToArmSME
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VectorToGPU
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VectorToLLVM
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VectorToSCF
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VectorToSPIRV
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VectorToXeGPU
[mlir][XeGPU][VectorToXeGPU] Use 'xegpu.load' to lower 1D 'vector.transfer_read' for PVC & BMG (#168910)
2025-11-24 13:01:57 +01:00
XeGPUToXeVM
[MLIR][XeGPU] Support subview memref: handling the base address during xegpu to xevm type conversion (#170541)
2025-12-10 08:53:18 -08:00
XeVMToLLVM
[mlir][LLVM] Resync memory effect attribute with LLVM IR (#168568)
2025-11-19 11:56:04 -05:00