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2823b68580
A VectorTypeCastOp can only be used to lower between statically sized contiguous memrefs of scalar and matching vector type. The sizes and strides are thus fully static and easy to determine. A relevant test is added. This is a step towards solving tensorflow/mlir#189. PiperOrigin-RevId: 275538981
297 lines
12 KiB
C++
297 lines
12 KiB
C++
//===- LowerToLLVMDialect.cpp - conversion from Linalg to LLVM dialect ----===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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#include "mlir/Conversion/VectorToLLVM/VectorToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/VectorOps/VectorOps.h"
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#include "mlir/IR/Attributes.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/Module.h"
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#include "mlir/IR/Operation.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/IR/Types.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Transforms/Passes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace mlir;
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template <typename T>
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static LLVM::LLVMType getPtrToElementType(T containerType,
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LLVMTypeConverter &lowering) {
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return lowering.convertType(containerType.getElementType())
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.template cast<LLVM::LLVMType>()
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.getPointerTo();
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}
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class ExtractElementOpConversion : public LLVMOpLowering {
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public:
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explicit ExtractElementOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::ExtractElementOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto adaptor = vector::ExtractElementOpOperandAdaptor(operands);
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auto extractOp = cast<vector::ExtractElementOp>(op);
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auto vectorType = extractOp.vector()->getType().cast<VectorType>();
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auto resultType = extractOp.getResult()->getType();
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auto llvmResultType = lowering.convertType(resultType);
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auto positionArrayAttr = extractOp.position();
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// One-shot extraction of vector from array (only requires extractvalue).
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if (resultType.isa<VectorType>()) {
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Value *extracted = rewriter.create<LLVM::ExtractValueOp>(
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loc, llvmResultType, adaptor.vector(), positionArrayAttr);
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rewriter.replaceOp(op, extracted);
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return matchSuccess();
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}
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// Potential extraction of 1-D vector from struct.
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auto *context = op->getContext();
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Value *extracted = adaptor.vector();
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auto positionAttrs = positionArrayAttr.getValue();
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auto i32Type = rewriter.getIntegerType(32);
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if (positionAttrs.size() > 1) {
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auto nDVectorType = vectorType;
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auto oneDVectorType = VectorType::get(nDVectorType.getShape().take_back(),
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nDVectorType.getElementType());
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auto nMinusOnePositionAttrs =
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ArrayAttr::get(positionAttrs.drop_back(), context);
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extracted = rewriter.create<LLVM::ExtractValueOp>(
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loc, lowering.convertType(oneDVectorType), extracted,
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nMinusOnePositionAttrs);
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}
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// Remaining extraction of element from 1-D LLVM vector
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auto position = positionAttrs.back().cast<IntegerAttr>();
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auto constant = rewriter.create<LLVM::ConstantOp>(
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loc, lowering.convertType(i32Type), position);
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extracted =
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rewriter.create<LLVM::ExtractElementOp>(loc, extracted, constant);
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rewriter.replaceOp(op, extracted);
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return matchSuccess();
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}
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};
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class OuterProductOpConversion : public LLVMOpLowering {
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public:
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explicit OuterProductOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::OuterProductOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto adaptor = vector::OuterProductOpOperandAdaptor(operands);
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auto *ctx = op->getContext();
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auto vLHS = adaptor.lhs()->getType().cast<LLVM::LLVMType>();
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auto vRHS = adaptor.rhs()->getType().cast<LLVM::LLVMType>();
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auto rankLHS = vLHS.getUnderlyingType()->getVectorNumElements();
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auto rankRHS = vRHS.getUnderlyingType()->getVectorNumElements();
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auto llvmArrayOfVectType = lowering.convertType(
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cast<vector::OuterProductOp>(op).getResult()->getType());
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Value *desc = rewriter.create<LLVM::UndefOp>(loc, llvmArrayOfVectType);
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Value *a = adaptor.lhs(), *b = adaptor.rhs();
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Value *acc = adaptor.acc().empty() ? nullptr : adaptor.acc().front();
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SmallVector<Value *, 8> lhs, accs;
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lhs.reserve(rankLHS);
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accs.reserve(rankLHS);
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for (unsigned d = 0, e = rankLHS; d < e; ++d) {
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// shufflevector explicitly requires i32.
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auto attr = rewriter.getI32IntegerAttr(d);
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SmallVector<Attribute, 4> bcastAttr(rankRHS, attr);
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auto bcastArrayAttr = ArrayAttr::get(bcastAttr, ctx);
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Value *aD = nullptr, *accD = nullptr;
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// 1. Broadcast the element a[d] into vector aD.
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aD = rewriter.create<LLVM::ShuffleVectorOp>(loc, a, a, bcastArrayAttr);
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// 2. If acc is present, extract 1-d vector acc[d] into accD.
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if (acc)
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accD = rewriter.create<LLVM::ExtractValueOp>(
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loc, vRHS, acc, rewriter.getI64ArrayAttr(d));
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// 3. Compute aD outer b (plus accD, if relevant).
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Value *aOuterbD =
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accD ? rewriter.create<LLVM::FMulAddOp>(loc, vRHS, aD, b, accD)
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.getResult()
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: rewriter.create<LLVM::FMulOp>(loc, aD, b).getResult();
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// 4. Insert as value `d` in the descriptor.
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desc = rewriter.create<LLVM::InsertValueOp>(loc, llvmArrayOfVectType,
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desc, aOuterbD,
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rewriter.getI64ArrayAttr(d));
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}
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rewriter.replaceOp(op, desc);
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return matchSuccess();
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}
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};
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class VectorTypeCastOpConversion : public LLVMOpLowering {
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public:
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explicit VectorTypeCastOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::VectorTypeCastOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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vector::VectorTypeCastOp castOp = cast<vector::VectorTypeCastOp>(op);
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MemRefType sourceMemRefType =
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castOp.getOperand()->getType().cast<MemRefType>();
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MemRefType targetMemRefType =
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castOp.getResult()->getType().cast<MemRefType>();
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// Only static shape casts supported atm.
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if (!sourceMemRefType.hasStaticShape() ||
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!targetMemRefType.hasStaticShape())
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return matchFailure();
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Value *sourceMemRef = operands[0];
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auto llvmSourceDescriptorTy =
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sourceMemRef->getType().dyn_cast<LLVM::LLVMType>();
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if (!llvmSourceDescriptorTy || !llvmSourceDescriptorTy.isStructTy())
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return matchFailure();
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auto llvmTargetDescriptorTy = lowering.convertType(targetMemRefType)
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.dyn_cast_or_null<LLVM::LLVMType>();
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if (!llvmTargetDescriptorTy || !llvmTargetDescriptorTy.isStructTy())
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return matchFailure();
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Type llvmSourceElementTy = llvmSourceDescriptorTy.getStructElementType(
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LLVMTypeConverter::kPtrPosInMemRefDescriptor);
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Type llvmTargetElementTy = llvmTargetDescriptorTy.getStructElementType(
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LLVMTypeConverter::kPtrPosInMemRefDescriptor);
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int64_t offset;
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SmallVector<int64_t, 4> strides;
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auto successStrides =
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getStridesAndOffset(targetMemRefType, strides, offset);
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bool isContiguous = (strides.back() == 1);
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if (isContiguous) {
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auto sizes = targetMemRefType.getShape();
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for (int index = 0, e = strides.size() - 2; index < e; ++index) {
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if (strides[index] != strides[index + 1] * sizes[index + 1]) {
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isContiguous = false;
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break;
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}
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}
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}
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// Only contiguous tensors supported atm.
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if (failed(successStrides) || !isContiguous)
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return matchFailure();
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auto int64Ty = LLVM::LLVMType::getInt64Ty(lowering.getDialect());
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// Create descriptor.
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Value *desc = rewriter.create<LLVM::UndefOp>(loc, llvmTargetDescriptorTy);
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// Set ptr.
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Value *ptr = rewriter.create<LLVM::ExtractValueOp>(
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loc, llvmSourceElementTy, sourceMemRef,
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rewriter.getIndexArrayAttr(
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LLVMTypeConverter::kPtrPosInMemRefDescriptor));
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ptr = rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, ptr);
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desc = rewriter.create<LLVM::InsertValueOp>(
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op->getLoc(), llvmTargetDescriptorTy, desc, ptr,
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rewriter.getIndexArrayAttr(
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LLVMTypeConverter::kPtrPosInMemRefDescriptor));
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// Fill offset 0.
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auto attr = rewriter.getIntegerAttr(rewriter.getIndexType(), 0);
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auto zero = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, attr);
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desc = rewriter.create<LLVM::InsertValueOp>(
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op->getLoc(), llvmTargetDescriptorTy, desc, zero,
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rewriter.getIndexArrayAttr(
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LLVMTypeConverter::kOffsetPosInMemRefDescriptor));
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// Fill size and stride descriptors in memref.
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for (auto indexedSize : llvm::enumerate(targetMemRefType.getShape())) {
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int64_t index = indexedSize.index();
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auto sizeAttr =
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rewriter.getIntegerAttr(rewriter.getIndexType(), indexedSize.value());
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auto size = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, sizeAttr);
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desc = rewriter.create<LLVM::InsertValueOp>(
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op->getLoc(), llvmTargetDescriptorTy, desc, size,
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rewriter.getI64ArrayAttr(
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{LLVMTypeConverter::kSizePosInMemRefDescriptor, index}));
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auto strideAttr =
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rewriter.getIntegerAttr(rewriter.getIndexType(), strides[index]);
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auto stride = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, strideAttr);
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desc = rewriter.create<LLVM::InsertValueOp>(
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op->getLoc(), llvmTargetDescriptorTy, desc, stride,
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rewriter.getI64ArrayAttr(
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{LLVMTypeConverter::kStridePosInMemRefDescriptor, index}));
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}
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rewriter.replaceOp(op, desc);
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return matchSuccess();
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}
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};
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/// Populate the given list with patterns that convert from Vector to LLVM.
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void mlir::populateVectorToLLVMConversionPatterns(
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LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
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patterns.insert<ExtractElementOpConversion, OuterProductOpConversion,
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VectorTypeCastOpConversion>(
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converter.getDialect()->getContext(), converter);
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}
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namespace {
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struct LowerVectorToLLVMPass : public ModulePass<LowerVectorToLLVMPass> {
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void runOnModule() override;
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};
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} // namespace
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void LowerVectorToLLVMPass::runOnModule() {
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// Convert to the LLVM IR dialect using the converter defined above.
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OwningRewritePatternList patterns;
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LLVMTypeConverter converter(&getContext());
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populateVectorToLLVMConversionPatterns(converter, patterns);
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populateStdToLLVMConversionPatterns(converter, patterns);
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ConversionTarget target(getContext());
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target.addLegalDialect<LLVM::LLVMDialect>();
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target.addDynamicallyLegalOp<FuncOp>(
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[&](FuncOp op) { return converter.isSignatureLegal(op.getType()); });
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if (failed(
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applyPartialConversion(getModule(), target, patterns, &converter))) {
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signalPassFailure();
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}
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}
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OpPassBase<ModuleOp> *mlir::createLowerVectorToLLVMPass() {
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return new LowerVectorToLLVMPass();
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}
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static PassRegistration<LowerVectorToLLVMPass>
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pass("convert-vector-to-llvm",
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"Lower the operations from the vector dialect into the LLVM dialect");
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