intel/llvm

mirror of https://github.com/intel/llvm.git synced 2026-02-05 22:17:23 +08:00

Files

Tobias Gysi e893708aac [mlir] Avoid GCC naming conflict.

Rename AbstractType to AbstractTy to avoid a GCC naming conflict after https://reviews.llvm.org/D104234.

Differential Revision: https://reviews.llvm.org/D104297

2021-06-15 14:48:30 +00:00

cmake/modules

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docs

[mlir] separable registration of attribute and type interfaces

2021-06-15 15:20:27 +02:00

examples

[MLIR][NFC] Rename MemRefDataFlow -> AffineScalarReplacement

2021-06-14 17:52:53 +05:30

include

[mlir] Avoid GCC naming conflict.

2021-06-15 14:48:30 +00:00

lib

[mlir] Add SignOp to complex dialect.

2021-06-15 15:22:31 +02:00

python

[mlir][linalg][python] Adapt the OpDSL to use scalars.

2021-06-15 12:54:00 +00:00

test

[mlir] Add SignOp to complex dialect.

2021-06-15 15:22:31 +02:00

tools

[mlir] separable registration of attribute and type interfaces

2021-06-15 15:20:27 +02:00

unittests

[mlir] separable registration of attribute and type interfaces

2021-06-15 15:20:27 +02:00

utils

[mlir-vscode] Fix dependencies to enable packaging the extension properly.

2021-06-10 11:34:04 -07:00

.clang-format

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.clang-tidy

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CMakeLists.txt

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LICENSE.TXT

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README.md

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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.