intel/llvm

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Bharathi Ramana Joshi 3eb9fd8ac8 [MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736 )

2024-01-07 17:06:52 +05:30

..

benchmark/python

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Revert "[mlir] Consider mlir-linalg-ods-gen as a tablegen tool in build (#75093 )"

2024-01-04 02:01:16 +05:00

[mlir][gpu] Improve gpu-lower-to-nvvm-pipeline Documentation (#77062 )

2024-01-05 12:51:25 +01:00

[mlir] Add config for PDL (#69927 )

2024-01-03 20:37:20 -08:00

[MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736 )

2024-01-07 17:06:52 +05:30

[MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736 )

2024-01-07 17:06:52 +05:30

[mlir][python] add MemRefTypeAttr attr builder (#76371 )

2024-01-06 16:42:14 -06:00

[mlir][spirv] Use assemblyFormat to define atomic op assembly (#76323 )

2024-01-06 19:55:55 -08:00

add prop-dict support for custom directive for mlir-tblgen (#77061 )

2024-01-05 12:37:24 +01:00

[MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736 )

2024-01-07 17:06:52 +05:30

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.clang-format

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.clang-tidy

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CMakeLists.txt

[mlir] Add config for PDL (#69927 )

2024-01-03 20:37:20 -08:00

LICENSE.TXT

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README.md

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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.