Nicolas Vasilache 2fae7878d5 [mlir][Vector] Mostly-NFC - Restructure options for lowering to LLVM Matrix Intrinsics ...

Summary:
This revision restructures the calling of vector transforms to make it more flexible to ask for lowering through LLVM matrix intrinsics.
This also makes sure we bail out in degenerate cases (i.e. 1) in which LLVM complains about not being able to scalarize.

Differential Revision: https://reviews.llvm.org/D76266

2020-03-17 22:58:02 -04:00

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Analysis

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Conversion

[mlir] LLVM dialect: move ensureDistinctSuccessors out of std->LLVM conversion

2020-03-17 15:22:14 +01:00

Dialect

[mlir][Vector] Mostly-NFC - Restructure options for lowering to LLVM Matrix Intrinsics

2020-03-17 22:58:02 -04:00

EDSC

[mlir][NFC] Renamed VectorOps to Vector

2020-03-17 15:28:08 -07:00

Examples

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IR

Affine expr simplification for add of const multiple of same expression

2020-03-17 08:22:17 +05:30

lib

[mlir][Vector] Mostly-NFC - Restructure options for lowering to LLVM Matrix Intrinsics

2020-03-17 22:58:02 -04:00

mlir-cpu-runner

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mlir-cuda-runner

[MLIR] Add and, or, xor, min, max too gpu.all_reduce and the nvvm lowering

2020-03-11 14:07:04 +01:00

mlir-opt

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mlir-tblgen

[mlir] Automatically add DerivedAttribute op interface

2020-03-13 14:26:30 -07:00

mlir-vulkan-runner

[mlir][spirv] Use spv.vce in spv.module and wire up (de)serialization

2020-03-12 19:37:45 -04:00

Pass

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Quantizer

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SDBM

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Target

[MLIR] Added llvm.fence

2020-03-17 17:53:37 +01:00

Transforms

[MLIR][NFC] update/clean up affine PDT, related utils, its test case

2020-03-17 06:12:16 +05:30

Unit

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APITest.h

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CMakeLists.txt

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lit.cfg.py

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lit.site.cfg.py.in

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