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llvm/mlir/test/Dialect/GPU
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James Newling 0928f46c69 [MLIR][GPU] Ensure all lanes in cluster have final reduction value (#165764)
This is a fix for a cluster size of 32 when the subgroup size is 64.
Previously, only lanes [16, 32) u [48, 64) contained the correct
clusterwise reduction value. This PR adds a swizzle instruction to
broadcast the correct value down to lanes [0, 16) u [32, 48).
2025-10-31 09:12:43 -07:00
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all-reduce-add.mlir
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all-reduce-maxf.mlir
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async-region.mlir
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barrier-elimination.mlir
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broadcast-speculatability.mlir
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bufferization-buffer-deallocation.mlir
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canonicalize.mlir
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decompose-memrefs.mlir
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dynamic-shared-memory.mlir
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globalId-rewrite.mlir
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indirect-device-func-call.mlir
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int-range-interface.mlir
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invalid.mlir
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mapping.mlir
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memref-to-llvm.mlir
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module-to-binary-invalid.mlir
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module-to-binary-nvvm.mlir
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module-to-binary-rocdl.mlir
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module-to-binary-spirv.mlir
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multiple-all-reduce.mlir
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nvvm-attach-target.mlir
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ops.mlir
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outlining.mlir
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promote-shuffle-amdgpu.mlir
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promotion.mlir
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shuffle-rewrite.mlir
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sink-ops.mlir
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sparse-roundtrip.mlir
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spirv-attach-targets.mlir
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subgroup-mma-vector-unroll.mlir
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subgroup-reduce-lowering.mlir
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subgroupId-rewrite.mlir
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test-nvvm-pipeline.mlir
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transform-gpu-failing.mlir
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transform-gpu.mlir
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value-bounds-op-interface-impl.mlir
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