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5ea1c87364
With this patch, vector registers can be read and written when debugging a live process. Note: We currently assume that all LoongArch64 processors include the LSX and LASX extensions. To add test cases, the following modifications were also made: lldb/packages/Python/lldbsuite/test/lldbtest.py lldb/packages/Python/lldbsuite/test/make/Makefile.rules Reviewed By: DavidSpickett, SixWeining Pull Request: https://github.com/llvm/llvm-project/pull/120664
593 lines
16 KiB
C++
593 lines
16 KiB
C++
//===-- NativeRegisterContextLinux_loongarch64.cpp ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#if defined(__loongarch__) && __loongarch_grlen == 64
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#include "NativeRegisterContextLinux_loongarch64.h"
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#include "lldb/Host/HostInfo.h"
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#include "lldb/Host/linux/Ptrace.h"
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#include "lldb/Utility/DataBufferHeap.h"
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#include "lldb/Utility/Log.h"
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#include "lldb/Utility/RegisterValue.h"
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#include "lldb/Utility/Status.h"
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#include "Plugins/Process/Linux/NativeProcessLinux.h"
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#include "Plugins/Process/Linux/Procfs.h"
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#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
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#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
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// NT_PRSTATUS and NT_FPREGSET definition
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#include <elf.h>
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// struct iovec definition
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#include <sys/uio.h>
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#ifndef NT_LOONGARCH_LSX
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#define NT_LOONGARCH_LSX 0xa02 /* LoongArch SIMD eXtension registers */
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#endif
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#ifndef NT_LOONGARCH_LASX
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#define NT_LOONGARCH_LASX \
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0xa03 /* LoongArch Advanced SIMD eXtension registers */
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#endif
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#define REG_CONTEXT_SIZE \
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(GetGPRSize() + GetFPRSize() + sizeof(m_lsx) + sizeof(m_lasx))
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using namespace lldb;
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using namespace lldb_private;
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using namespace lldb_private::process_linux;
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std::unique_ptr<NativeRegisterContextLinux>
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NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
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const ArchSpec &target_arch, NativeThreadLinux &native_thread) {
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switch (target_arch.GetMachine()) {
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case llvm::Triple::loongarch64: {
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Flags opt_regsets;
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auto register_info_up = std::make_unique<RegisterInfoPOSIX_loongarch64>(
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target_arch, opt_regsets);
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return std::make_unique<NativeRegisterContextLinux_loongarch64>(
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target_arch, native_thread, std::move(register_info_up));
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}
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default:
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llvm_unreachable("have no register context for architecture");
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}
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}
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llvm::Expected<ArchSpec>
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NativeRegisterContextLinux::DetermineArchitecture(lldb::tid_t tid) {
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return HostInfo::GetArchitecture();
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}
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NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
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const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
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std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info_up)
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: NativeRegisterContextRegisterInfo(native_thread,
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register_info_up.release()),
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NativeRegisterContextLinux(native_thread) {
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::memset(&m_fpr, 0, sizeof(m_fpr));
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::memset(&m_gpr, 0, sizeof(m_gpr));
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::memset(&m_lsx, 0, sizeof(m_lsx));
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::memset(&m_lasx, 0, sizeof(m_lasx));
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::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
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::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
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// Refer to:
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// https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints
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// 14 is just a maximum value, query hardware for actual watchpoint count.
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m_max_hwp_supported = 14;
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m_max_hbp_supported = 14;
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m_refresh_hwdebug_info = true;
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m_gpr_is_valid = false;
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m_fpu_is_valid = false;
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m_lsx_is_valid = false;
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m_lasx_is_valid = false;
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}
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const RegisterInfoPOSIX_loongarch64 &
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NativeRegisterContextLinux_loongarch64::GetRegisterInfo() const {
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return static_cast<const RegisterInfoPOSIX_loongarch64 &>(
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NativeRegisterContextRegisterInfo::GetRegisterInfoInterface());
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}
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uint32_t NativeRegisterContextLinux_loongarch64::GetRegisterSetCount() const {
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return GetRegisterInfo().GetRegisterSetCount();
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}
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const RegisterSet *NativeRegisterContextLinux_loongarch64::GetRegisterSet(
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uint32_t set_index) const {
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return GetRegisterInfo().GetRegisterSet(set_index);
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}
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uint32_t NativeRegisterContextLinux_loongarch64::GetUserRegisterCount() const {
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uint32_t count = 0;
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for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
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count += GetRegisterSet(set_index)->num_registers;
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return count;
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}
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Status NativeRegisterContextLinux_loongarch64::ReadRegister(
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const RegisterInfo *reg_info, RegisterValue ®_value) {
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Status error;
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if (!reg_info) {
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error = Status::FromErrorString("reg_info NULL");
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return error;
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}
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const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
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if (reg == LLDB_INVALID_REGNUM)
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return Status::FromErrorStringWithFormat(
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"no lldb regnum for %s",
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reg_info && reg_info->name ? reg_info->name : "<unknown register>");
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uint8_t *src = nullptr;
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uint32_t offset = LLDB_INVALID_INDEX32;
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if (IsGPR(reg)) {
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error = ReadGPR();
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if (error.Fail())
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return error;
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offset = reg_info->byte_offset;
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assert(offset < GetGPRSize());
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src = (uint8_t *)GetGPRBuffer() + offset;
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} else if (IsFPR(reg)) {
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error = ReadFPR();
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if (error.Fail())
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return error;
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offset = CalculateFprOffset(reg_info);
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assert(offset < GetFPRSize());
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src = (uint8_t *)GetFPRBuffer() + offset;
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} else if (IsLSX(reg)) {
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error = ReadLSX();
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if (error.Fail())
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return error;
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offset = CalculateLsxOffset(reg_info);
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assert(offset < sizeof(m_lsx));
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src = (uint8_t *)&m_lsx + offset;
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} else if (IsLASX(reg)) {
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error = ReadLASX();
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if (error.Fail())
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return error;
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offset = CalculateLasxOffset(reg_info);
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assert(offset < sizeof(m_lasx));
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src = (uint8_t *)&m_lasx + offset;
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} else
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return Status::FromErrorString(
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"failed - register wasn't recognized to be a GPR or an FPR, "
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"write strategy unknown");
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reg_value.SetFromMemoryData(*reg_info, src, reg_info->byte_size,
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eByteOrderLittle, error);
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteRegister(
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const RegisterInfo *reg_info, const RegisterValue ®_value) {
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Status error;
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if (!reg_info)
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return Status::FromErrorString("reg_info NULL");
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const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
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if (reg == LLDB_INVALID_REGNUM)
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return Status::FromErrorStringWithFormat(
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"no lldb regnum for %s",
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reg_info->name != nullptr ? reg_info->name : "<unknown register>");
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uint8_t *dst = nullptr;
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uint32_t offset = LLDB_INVALID_INDEX32;
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if (IsGPR(reg)) {
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error = ReadGPR();
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if (error.Fail())
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return error;
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assert(reg_info->byte_offset < GetGPRSize());
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dst = (uint8_t *)GetGPRBuffer() + reg_info->byte_offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteGPR();
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} else if (IsFPR(reg)) {
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error = ReadFPR();
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if (error.Fail())
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return error;
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offset = CalculateFprOffset(reg_info);
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assert(offset < GetFPRSize());
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dst = (uint8_t *)GetFPRBuffer() + offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteFPR();
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} else if (IsLSX(reg)) {
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error = ReadLSX();
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if (error.Fail())
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return error;
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offset = CalculateLsxOffset(reg_info);
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assert(offset < sizeof(m_lsx));
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dst = (uint8_t *)&m_lsx + offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteLSX();
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} else if (IsLASX(reg)) {
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error = ReadLASX();
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if (error.Fail())
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return error;
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offset = CalculateLasxOffset(reg_info);
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assert(offset < sizeof(m_lasx));
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dst = (uint8_t *)&m_lasx + offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteLASX();
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}
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return Status::FromErrorString("Failed to write register value");
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}
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Status NativeRegisterContextLinux_loongarch64::ReadAllRegisterValues(
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lldb::WritableDataBufferSP &data_sp) {
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Status error;
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data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
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error = ReadGPR();
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if (error.Fail())
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return error;
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error = ReadFPR();
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if (error.Fail())
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return error;
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error = ReadLSX();
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if (error.Fail())
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return error;
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error = ReadLASX();
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if (error.Fail())
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return error;
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uint8_t *dst = data_sp->GetBytes();
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::memcpy(dst, GetGPRBuffer(), GetGPRSize());
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dst += GetGPRSize();
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::memcpy(dst, GetFPRBuffer(), GetFPRSize());
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dst += GetFPRSize();
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::memcpy(dst, &m_lsx, sizeof(m_lsx));
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dst += sizeof(m_lsx);
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::memcpy(dst, &m_lasx, sizeof(m_lasx));
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteAllRegisterValues(
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const lldb::DataBufferSP &data_sp) {
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Status error;
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if (!data_sp) {
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error = Status::FromErrorStringWithFormat(
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"NativeRegisterContextLinux_loongarch64::%s invalid data_sp provided",
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__FUNCTION__);
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return error;
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}
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if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
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error = Status::FromErrorStringWithFormat(
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"NativeRegisterContextLinux_loongarch64::%s data_sp contained "
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"mismatched data size, expected %" PRIu64 ", actual %" PRIu64,
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__FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize());
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return error;
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}
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const uint8_t *src = data_sp->GetBytes();
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if (src == nullptr) {
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error = Status::FromErrorStringWithFormat(
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"NativeRegisterContextLinux_loongarch64::%s "
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"DataBuffer::GetBytes() returned a null "
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"pointer",
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__FUNCTION__);
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return error;
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}
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::memcpy(GetGPRBuffer(), src, GetRegisterInfoInterface().GetGPRSize());
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error = WriteGPR();
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if (error.Fail())
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return error;
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src += GetRegisterInfoInterface().GetGPRSize();
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::memcpy(GetFPRBuffer(), src, GetFPRSize());
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m_fpu_is_valid = true;
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error = WriteFPR();
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if (error.Fail())
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return error;
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// Currently, we assume that LoongArch always support LASX.
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// TODO: check whether LSX/LASX exists.
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src += GetFPRSize();
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::memcpy(&m_lsx, src, sizeof(m_lsx));
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m_lsx_is_valid = true;
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error = WriteLSX();
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if (error.Fail())
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return error;
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src += sizeof(m_lsx);
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::memcpy(&m_lasx, src, sizeof(m_lasx));
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m_lasx_is_valid = true;
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error = WriteLASX();
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if (error.Fail())
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return error;
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return error;
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}
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bool NativeRegisterContextLinux_loongarch64::IsGPR(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::GPRegSet;
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}
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bool NativeRegisterContextLinux_loongarch64::IsFPR(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::FPRegSet;
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}
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bool NativeRegisterContextLinux_loongarch64::IsLSX(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::LSXRegSet;
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}
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bool NativeRegisterContextLinux_loongarch64::IsLASX(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::LASXRegSet;
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}
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Status NativeRegisterContextLinux_loongarch64::ReadGPR() {
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Status error;
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if (m_gpr_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetGPRBuffer();
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ioVec.iov_len = GetGPRSize();
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error = ReadRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
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if (error.Success())
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m_gpr_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteGPR() {
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Status error = ReadGPR();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetGPRBuffer();
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ioVec.iov_len = GetGPRSize();
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m_gpr_is_valid = false;
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return WriteRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
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}
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Status NativeRegisterContextLinux_loongarch64::ReadFPR() {
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Status error;
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if (m_fpu_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetFPRBuffer();
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ioVec.iov_len = GetFPRSize();
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error = ReadRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
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if (error.Success())
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m_fpu_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteFPR() {
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Status error = ReadFPR();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetFPRBuffer();
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ioVec.iov_len = GetFPRSize();
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m_fpu_is_valid = false;
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m_lsx_is_valid = false;
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m_lasx_is_valid = false;
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return WriteRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
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}
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Status NativeRegisterContextLinux_loongarch64::ReadLSX() {
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Status error;
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if (m_lsx_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = &m_lsx;
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ioVec.iov_len = sizeof(m_lsx);
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error = ReadRegisterSet(&ioVec, sizeof(m_lsx), NT_LOONGARCH_LSX);
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if (error.Success())
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m_lsx_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteLSX() {
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Status error = ReadLSX();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = &m_lsx;
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ioVec.iov_len = sizeof(m_lsx);
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m_fpu_is_valid = false;
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m_lsx_is_valid = false;
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m_lasx_is_valid = false;
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return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LOONGARCH_LSX);
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}
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Status NativeRegisterContextLinux_loongarch64::ReadLASX() {
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Status error;
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if (m_lasx_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = &m_lasx;
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ioVec.iov_len = sizeof(m_lasx);
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error = ReadRegisterSet(&ioVec, sizeof(m_lasx), NT_LOONGARCH_LASX);
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if (error.Success())
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m_lasx_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteLASX() {
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Status error = ReadLASX();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = &m_lasx;
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ioVec.iov_len = sizeof(m_lasx);
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m_fpu_is_valid = false;
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m_lsx_is_valid = false;
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m_lasx_is_valid = false;
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return WriteRegisterSet(&ioVec, sizeof(m_lasx), NT_LOONGARCH_LASX);
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}
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void NativeRegisterContextLinux_loongarch64::InvalidateAllRegisters() {
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m_gpr_is_valid = false;
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m_fpu_is_valid = false;
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m_lsx_is_valid = false;
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m_lasx_is_valid = false;
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}
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uint32_t NativeRegisterContextLinux_loongarch64::CalculateFprOffset(
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const RegisterInfo *reg_info) const {
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return reg_info->byte_offset - GetGPRSize();
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}
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uint32_t NativeRegisterContextLinux_loongarch64::CalculateLsxOffset(
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const RegisterInfo *reg_info) const {
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return reg_info->byte_offset - GetGPRSize() - sizeof(m_fpr);
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}
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uint32_t NativeRegisterContextLinux_loongarch64::CalculateLasxOffset(
|
|
const RegisterInfo *reg_info) const {
|
|
return reg_info->byte_offset - GetGPRSize() - sizeof(m_fpr) - sizeof(m_lsx);
|
|
}
|
|
|
|
std::vector<uint32_t>
|
|
NativeRegisterContextLinux_loongarch64::GetExpeditedRegisters(
|
|
ExpeditedRegs expType) const {
|
|
std::vector<uint32_t> expedited_reg_nums =
|
|
NativeRegisterContext::GetExpeditedRegisters(expType);
|
|
|
|
return expedited_reg_nums;
|
|
}
|
|
|
|
llvm::Error NativeRegisterContextLinux_loongarch64::ReadHardwareDebugInfo() {
|
|
if (!m_refresh_hwdebug_info)
|
|
return llvm::Error::success();
|
|
|
|
::pid_t tid = m_thread.GetID();
|
|
|
|
int regset = NT_LOONGARCH_HW_WATCH;
|
|
struct iovec ioVec;
|
|
struct user_watch_state dreg_state;
|
|
Status error;
|
|
|
|
ioVec.iov_base = &dreg_state;
|
|
ioVec.iov_len = sizeof(dreg_state);
|
|
error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, ®set,
|
|
&ioVec, ioVec.iov_len);
|
|
if (error.Fail())
|
|
return error.ToError();
|
|
|
|
m_max_hwp_supported = dreg_state.dbg_info & 0x3f;
|
|
|
|
regset = NT_LOONGARCH_HW_BREAK;
|
|
error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, ®set,
|
|
&ioVec, ioVec.iov_len);
|
|
if (error.Fail())
|
|
return error.ToError();
|
|
|
|
m_max_hbp_supported = dreg_state.dbg_info & 0x3f;
|
|
|
|
m_refresh_hwdebug_info = false;
|
|
|
|
return llvm::Error::success();
|
|
}
|
|
|
|
llvm::Error NativeRegisterContextLinux_loongarch64::WriteHardwareDebugRegs(
|
|
DREGType hwbType) {
|
|
struct iovec ioVec;
|
|
struct user_watch_state dreg_state;
|
|
int regset;
|
|
|
|
memset(&dreg_state, 0, sizeof(dreg_state));
|
|
ioVec.iov_base = &dreg_state;
|
|
|
|
switch (hwbType) {
|
|
case eDREGTypeWATCH:
|
|
regset = NT_LOONGARCH_HW_WATCH;
|
|
ioVec.iov_len = sizeof(dreg_state.dbg_info) +
|
|
(sizeof(dreg_state.dbg_regs[0]) * m_max_hwp_supported);
|
|
|
|
for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
|
|
dreg_state.dbg_regs[i].addr = m_hwp_regs[i].address;
|
|
dreg_state.dbg_regs[i].ctrl = m_hwp_regs[i].control;
|
|
}
|
|
break;
|
|
case eDREGTypeBREAK:
|
|
regset = NT_LOONGARCH_HW_BREAK;
|
|
ioVec.iov_len = sizeof(dreg_state.dbg_info) +
|
|
(sizeof(dreg_state.dbg_regs[0]) * m_max_hbp_supported);
|
|
|
|
for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
|
|
dreg_state.dbg_regs[i].addr = m_hbp_regs[i].address;
|
|
dreg_state.dbg_regs[i].ctrl = m_hbp_regs[i].control;
|
|
}
|
|
break;
|
|
}
|
|
|
|
return NativeProcessLinux::PtraceWrapper(PTRACE_SETREGSET, m_thread.GetID(),
|
|
®set, &ioVec, ioVec.iov_len)
|
|
.ToError();
|
|
}
|
|
#endif // defined(__loongarch__) && __loongarch_grlen == 64
|