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llvm/mlir
Christian Ulmann e0e615efac Revert "[MLIR][LLVM][Mem2Reg] Relax type equality requirement for load and store (#87504)" (#87631)
This reverts commit d6e4582198 as it
violates an assumption of Mem2Reg's block argument creation. Mem2Reg
strongly assumes that all involved values have the same type as the
alloca, which was relaxed by this PR. Therefore, branches got created
that jumped to basic blocks with differently typed block arguments.
2024-04-04 15:07:18 +02:00
..

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.