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llvm/mlir/test/Conversion
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Tobias Gysi 2ff6fad700 Revert "[mlir] make the bitwidth of device side index computations configurable" 
This reverts commit d10b1a38a7.
2020-06-23 19:21:36 +02:00
..
AffineToStandard
Enable FileCheck -enable-var-scope by default in MLIR test
2020-06-12 00:43:09 +00:00
AVX512ToLLVM
…
GPUCommon
Enable FileCheck -enable-var-scope by default in MLIR test
2020-06-12 00:43:09 +00:00
GPUToCUDA
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GPUToNVVM
Revert "[mlir] make the bitwidth of device side index computations configurable"
2020-06-23 19:21:36 +02:00
GPUToROCDL
Revert "[mlir] make the bitwidth of device side index computations configurable"
2020-06-23 19:21:36 +02:00
GPUToROCm
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GPUToSPIRV
Enable FileCheck -enable-var-scope by default in MLIR test
2020-06-12 00:43:09 +00:00
GPUToVulkan
[mlir][spirv] Enhance AccessChainOp index type handling
2020-06-22 10:11:33 -04:00
LinalgToSPIRV
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SCFToGPU
Enable FileCheck -enable-var-scope by default in MLIR test
2020-06-12 00:43:09 +00:00
SCFToStandard
…
ShapeToSCF
[mlir][shape] Update test case to new op asm format
2020-06-15 09:04:54 -07:00
ShapeToStandard
[MLIR][Shape] Lower shape.shape_of to standard dialect
2020-06-19 15:21:13 +00:00
SPIRVToLLVM
[MLIR][SPIRVToLLVM] Implementation of spv.func conversion, and return ops
2020-06-23 11:34:11 -04:00
StandardToLLVM
[MLIR][Standard] Lower std.dim with dynamic dimension operand to LLVM
2020-06-16 20:57:42 +00:00
StandardToSPIRV
[mlir][spirv] Legalize subviewop when used with vector transfer
2020-06-19 17:33:15 -07:00
VectorToLLVM
[mlir] [VectorOps] Improve vector.constant_mask lowering
2020-06-19 10:40:08 -07:00
VectorToROCDL
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VectorToSCF
[MLIR][Standard] Add documentation for std.dim and fix test cases
2020-06-15 10:40:36 +00:00