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63a6ca9150
Partial (-z relro) and full (-z relro, -z now) relro cases are implemented. Partial relro: The ELF sections are reordered so that the ELF internal data sections (.got, .dtors, etc.) precede the program's data sections (.data and .bss). .got is readonly, .got.plt is still writeable. Full relro: Supports all the features of partial RELRO, .got.plt is also readonly. Differential revision: http://reviews.llvm.org/D14218 llvm-svn: 253967
118 lines
2.9 KiB
ArmAsm
118 lines
2.9 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t
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// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/shared.s -o %t2
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// RUN: ld.lld %t2 -o %t2.so -shared
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// RUN: ld.lld %t %t2.so -o %t3
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// RUN: llvm-readobj -s %t3 | FileCheck --check-prefix=SEC %s
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// RUN: llvm-objdump -s -d %t3 | FileCheck %s
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// REQUIRES: x86
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// SEC: Name: .plt
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// SEC-NEXT: Type: SHT_PROGBITS
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// SEC-NEXT: Flags [
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// SEC-NEXT: SHF_ALLOC
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// SEC-NEXT: SHF_EXECINSTR
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// SEC-NEXT: ]
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// SEC-NEXT: Address: 0x11030
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// SEC-NEXT: Offset: 0x1030
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// SEC-NEXT: Size: 32
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// SEC: Name: .got
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// SEC-NEXT: Type: SHT_PROGBITS
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// SEC-NEXT: Flags [
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// SEC-NEXT: SHF_ALLOC
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// SEC-NEXT: SHF_WRITE
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// SEC-NEXT: ]
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// SEC-NEXT: Address: 0x120E0
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// SEC-NEXT: Offset:
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// SEC-NEXT: Size: 8
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// SEC-NEXT: Link: 0
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// SEC-NEXT: Info: 0
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// SEC-NEXT: AddressAlignment: 8
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// SEC-NEXT: EntrySize: 0
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// SEC-NEXT: }
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// SEC: Name: .got.plt
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// SEC-NEXT: Type: SHT_PROGBITS
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// SEC-NEXT: Flags [
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// SEC-NEXT: SHF_ALLOC
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// SEC-NEXT: SHF_WRITE
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// SEC-NEXT: ]
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// SEC-NEXT: Address: 0x120E8
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// SEC-NEXT: Offset: 0x20E8
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// SEC-NEXT: Size: 32
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// SEC-NEXT: Link: 0
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// SEC-NEXT: Info: 0
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// SEC-NEXT: AddressAlignment: 8
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// SEC-NEXT: EntrySize: 0
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// SEC-NEXT: }
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.section .text,"ax",@progbits,unique,1
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.global _start
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_start:
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call lulz
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.section .text,"ax",@progbits,unique,2
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.zero 4
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.global lulz
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lulz:
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nop
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// CHECK: Disassembly of section .text:
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// CHECK-NEXT: _start:
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// CHECK-NEXT: 11000: e8 04 00 00 00 callq 4
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// CHECK-NEXT: 11005:
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// CHECK: lulz:
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// CHECK-NEXT: 11009: 90 nop
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.section .text2,"ax",@progbits
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.global R_X86_64_32
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R_X86_64_32:
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movl $R_X86_64_32, %edx
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// FIXME: this would be far more self evident if llvm-objdump printed
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// constants in hex.
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// CHECK: Disassembly of section .text2:
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// CHECK-NEXT: R_X86_64_32:
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// CHECK-NEXT: 1100a: {{.*}} movl $69642, %edx
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.section .R_X86_64_32S,"ax",@progbits
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.global R_X86_64_32S
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R_X86_64_32S:
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movq lulz - 0x100000, %rdx
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// CHECK: Disassembly of section .R_X86_64_32S:
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// CHECK-NEXT: R_X86_64_32S:
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// CHECK-NEXT: {{.*}}: {{.*}} movq -978935, %rdx
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.section .R_X86_64_PC32,"ax",@progbits
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.global R_X86_64_PC32
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R_X86_64_PC32:
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call bar
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movl $bar, %eax
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//16 is a size of PLT[0]
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// 0x11030 + 16 - (0x11017 + 5) = 20
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// CHECK: Disassembly of section .R_X86_64_PC32:
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// CHECK-NEXT: R_X86_64_PC32:
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// CHECK-NEXT: 11017: {{.*}} callq 36
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// CHECK-NEXT: 1101c: {{.*}} movl $69696, %eax
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.section .R_X86_64_64,"a",@progbits
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.global R_X86_64_64
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R_X86_64_64:
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.quad R_X86_64_64
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// CHECK: Contents of section .R_X86_64_64:
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// CHECK-NEXT: 10190 90010100 00000000
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.section .R_X86_64_GOTPCREL,"a",@progbits
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.global R_X86_64_GOTPCREL
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R_X86_64_GOTPCREL:
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.long zed@gotpcrel
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// 0x120A8 - 0x10160 = 8008
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// 8008 = 0x481f0000 in little endian
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// CHECK: Contents of section .R_X86_64_GOTPCREL
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// CHECK-NEXT: 10198 481f0000
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