intel/llvm

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Marcel Koester 6f5da84f7b [mlir] Extended BufferPlacement to support nested region control flow.

Summary: The current BufferPlacement implementation does not support
nested region control flow. This CL adds support for nested regions via
the RegionBranchOpInterface and the detection of branch-like
(ReturnLike) terminators inside nested regions.

Differential Revision: https://reviews.llvm.org/D81926

2020-06-30 12:10:01 +02:00

..

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[MLIR] Add variadic isa<> for Type, Value, and Attribute

2020-06-29 15:04:48 -07:00

[MLIR] Add variadic isa<> for Type, Value, and Attribute

2020-06-29 15:04:48 -07:00

[ods] Update Operator to record Arg->[Attr|Operand]Index mapping

2020-06-29 16:40:52 -07:00

integration_test

[mlir] [VectorOps] Extend vector reduction integration test with reassoc=true cases.

2020-06-29 13:28:20 -07:00

[mlir] Extended BufferPlacement to support nested region control flow.

2020-06-30 12:10:01 +02:00

[mlir] Extended BufferPlacement to support nested region control flow.

2020-06-30 12:10:01 +02:00

[ods] Update Operator to record Arg->[Attr|Operand]Index mapping

2020-06-29 16:40:52 -07:00

[mlir-tblgen] Use fully qualified names in generated code files

2020-06-26 15:05:33 +02:00

[MLIR][SPIRV] Extend automation script to generate coverage report.

2020-06-23 11:42:59 -04:00

.clang-format

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.clang-tidy

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CMakeLists.txt

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LICENSE.TXT

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README.md

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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.