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ee95f6f259
The `vector.strided_slice` takes an n-D vector, k-D `offsets` integer array attribute, a
k-D `sizes` integer array attribute, a k-D `strides` integer array attribute and extracts
the n-D subvector at the proper offset.
Returns an n-D vector where the first k-D dimensions match the `sizes` attribute.
The returned subvector contains the elements starting at offset `offsets` and ending at
`offsets + sizes`.
Example:
```
%1 = vector.strided_slice %0
{offsets : [0, 2], sizes : [2, 4], strides : [1, 1]}:
vector<4x8x16xf32> // returns a vector<2x4x16xf32>
```
This op will be useful for progressive lowering within the VectorOp dialect.
PiperOrigin-RevId: 281352749
550 lines
23 KiB
C++
550 lines
23 KiB
C++
//===- VectorOps.cpp - MLIR Super Vectorizer Operations -------------------===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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//
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// This file implements convenience types for working with super-vectorization
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// operations, in particular super-vector loads and stores.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/VectorOps/VectorOps.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/AffineMap.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/OpImplementation.h"
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#include "mlir/IR/TypeUtilities.h"
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#include "mlir/Support/LLVM.h"
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using namespace mlir;
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using namespace mlir::vector;
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//===----------------------------------------------------------------------===//
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// VectorOpsDialect
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//===----------------------------------------------------------------------===//
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mlir::vector::VectorOpsDialect::VectorOpsDialect(MLIRContext *context)
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: Dialect(getDialectNamespace(), context) {
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addOperations<
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#define GET_OP_LIST
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#include "mlir/Dialect/VectorOps/VectorOps.cpp.inc"
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>();
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}
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//===----------------------------------------------------------------------===//
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// VectorExtractElementOp
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//===----------------------------------------------------------------------===//
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static Type inferExtractOpResultType(VectorType vectorType,
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ArrayAttr position) {
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if (static_cast<int64_t>(position.size()) == vectorType.getRank())
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return vectorType.getElementType();
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return VectorType::get(vectorType.getShape().drop_front(position.size()),
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vectorType.getElementType());
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}
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void VectorExtractElementOp::build(Builder *builder, OperationState &result,
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Value *source, ArrayRef<int32_t> position) {
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result.addOperands(source);
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auto positionAttr = builder->getI32ArrayAttr(position);
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result.addTypes(inferExtractOpResultType(source->getType().cast<VectorType>(),
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positionAttr));
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result.addAttribute(getPositionAttrName(), positionAttr);
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}
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static void print(OpAsmPrinter &p, VectorExtractElementOp op) {
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p << op.getOperationName() << " " << *op.vector() << op.position();
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p.printOptionalAttrDict(op.getAttrs(), {"position"});
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p << " : " << op.vector()->getType();
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}
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static ParseResult parseVectorExtractElementOp(OpAsmParser &parser,
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OperationState &result) {
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llvm::SMLoc attributeLoc, typeLoc;
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SmallVector<NamedAttribute, 4> attrs;
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OpAsmParser::OperandType vector;
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Type type;
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Attribute attr;
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if (parser.parseOperand(vector) || parser.getCurrentLocation(&attributeLoc) ||
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parser.parseAttribute(attr, "position", attrs) ||
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parser.parseOptionalAttrDict(attrs) ||
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parser.getCurrentLocation(&typeLoc) || parser.parseColonType(type))
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return failure();
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auto vectorType = type.dyn_cast<VectorType>();
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if (!vectorType)
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return parser.emitError(typeLoc, "expected vector type");
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auto positionAttr = attr.dyn_cast<ArrayAttr>();
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if (!positionAttr ||
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static_cast<int64_t>(positionAttr.size()) > vectorType.getRank())
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return parser.emitError(
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attributeLoc,
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"expected position attribute of rank smaller than vector rank");
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Type resType = inferExtractOpResultType(vectorType, positionAttr);
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result.attributes = attrs;
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return failure(parser.resolveOperand(vector, type, result.operands) ||
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parser.addTypeToList(resType, result.types));
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}
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static LogicalResult verify(VectorExtractElementOp op) {
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auto positionAttr = op.position().getValue();
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if (positionAttr.empty())
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return op.emitOpError("expected non-empty position attribute");
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if (positionAttr.size() > static_cast<unsigned>(op.getVectorType().getRank()))
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return op.emitOpError(
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"expected position attribute of rank smaller than vector rank");
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for (auto en : llvm::enumerate(positionAttr)) {
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auto attr = en.value().dyn_cast<IntegerAttr>();
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if (!attr || attr.getInt() < 0 ||
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attr.getInt() > op.getVectorType().getDimSize(en.index()))
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return op.emitOpError("expected position attribute #")
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<< (en.index() + 1)
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<< " to be a positive integer smaller than the corresponding "
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"vector dimension";
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}
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return success();
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}
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//===----------------------------------------------------------------------===//
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// VectorStridedSliceOp
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//===----------------------------------------------------------------------===//
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static Type inferVectorExtractRangeOpResultType(VectorType vectorType,
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ArrayAttr offsets,
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ArrayAttr sizes,
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ArrayAttr strides) {
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assert(offsets.size() == sizes.size() && offsets.size() == strides.size());
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SmallVector<int64_t, 4> shape;
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shape.reserve(vectorType.getRank());
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unsigned idx = 0;
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for (unsigned e = offsets.size(); idx < e; ++idx)
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shape.push_back(sizes.getValue()[idx].cast<IntegerAttr>().getInt());
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for (unsigned e = vectorType.getShape().size(); idx < e; ++idx)
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shape.push_back(vectorType.getShape()[idx]);
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return VectorType::get(shape, vectorType.getElementType());
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}
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void VectorStridedSliceOp::build(Builder *builder, OperationState &result,
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Value *source, ArrayRef<int64_t> offsets,
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ArrayRef<int64_t> sizes,
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ArrayRef<int64_t> strides) {
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result.addOperands(source);
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auto offsetsAttr = builder->getI64ArrayAttr(offsets);
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auto sizesAttr = builder->getI64ArrayAttr(sizes);
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auto stridesAttr = builder->getI64ArrayAttr(strides);
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result.addTypes(
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inferVectorExtractRangeOpResultType(source->getType().cast<VectorType>(),
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offsetsAttr, sizesAttr, stridesAttr));
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result.addAttribute(getOffsetsAttrName(), offsetsAttr);
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result.addAttribute(getSizesAttrName(), sizesAttr);
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result.addAttribute(getStridesAttrName(), stridesAttr);
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}
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static void print(OpAsmPrinter &p, VectorStridedSliceOp op) {
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p << op.getOperationName() << " " << *op.vector();
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p.printOptionalAttrDict(op.getAttrs());
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p << " : " << op.vector()->getType() << " to " << op.getResult()->getType();
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}
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static ParseResult parseVectorStridedSliceOp(OpAsmParser &parser,
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OperationState &result) {
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llvm::SMLoc attributeLoc, typeLoc;
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OpAsmParser::OperandType vector;
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VectorType vectorType, resultVectorType;
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return failure(parser.parseOperand(vector) ||
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parser.getCurrentLocation(&attributeLoc) ||
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parser.parseOptionalAttrDict(result.attributes) ||
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parser.getCurrentLocation(&typeLoc) ||
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parser.parseColonType(vectorType) ||
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parser.parseKeywordType("to", resultVectorType) ||
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parser.resolveOperand(vector, vectorType, result.operands) ||
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parser.addTypeToList(resultVectorType, result.types));
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}
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// TODO(ntv) Should be moved to Tablegen Confined attributes.
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static bool isIntegerArrayAttrSmallerThanShape(VectorStridedSliceOp op,
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ArrayAttr arrayAttr,
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ShapedType shape,
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StringRef attrName) {
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if (arrayAttr.size() > static_cast<unsigned>(shape.getRank())) {
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op.emitOpError("expected ")
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<< attrName << " attribute of rank smaller than vector rank";
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return false;
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}
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return true;
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}
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// Returns true if all integers in `arrayAttr` are in the half-open [min, max}
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// interval. If `halfOpen` is true then the admissible interval is [min, max).
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// Otherwise, the admissible interval is [min, max].
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static bool isIntegerArrayAttrConfinedToRange(VectorStridedSliceOp op,
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ArrayAttr arrayAttr, int64_t min,
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int64_t max, StringRef attrName,
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bool halfOpen = true) {
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for (auto attr : arrayAttr) {
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auto val = attr.cast<IntegerAttr>().getInt();
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auto upper = max;
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if (!halfOpen)
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upper += 1;
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if (val < min || val >= upper) {
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op.emitOpError("expected ")
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<< attrName << " to be confined to [" << min << ", " << upper << ")";
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return false;
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}
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}
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return true;
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}
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// Returns true if all integers in `arrayAttr` are in the half-open [min, max}
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// interval. If `halfOpen` is true then the admissible interval is [min, max).
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// Otherwise, the admissible interval is [min, max].
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static bool
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isIntegerArrayAttrConfinedToShape(VectorStridedSliceOp op, ArrayAttr arrayAttr,
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ShapedType shape, StringRef attrName,
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bool halfOpen = true, int64_t min = 0) {
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assert(arrayAttr.size() <= static_cast<unsigned>(shape.getRank()));
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for (auto it : llvm::zip(arrayAttr, shape.getShape())) {
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auto val = std::get<0>(it).cast<IntegerAttr>().getInt();
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auto max = std::get<1>(it);
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if (!halfOpen)
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max += 1;
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if (val < min || val >= max) {
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op.emitOpError("expected ")
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<< attrName << " to be confined to [" << min << ", " << max << ")";
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return false;
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}
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}
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return true;
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}
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// Returns true if all integers in `arrayAttr` are in the interval [min, max}.
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// interval. If `halfOpen` is true then the admissible interval is [min, max).
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// Otherwise, the admissible interval is [min, max].
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static bool isSumOfIntegerArrayAttrConfinedToShape(
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VectorStridedSliceOp op, ArrayAttr arrayAttr1, ArrayAttr arrayAttr2,
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ShapedType shape, StringRef attrName1, StringRef attrName2,
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bool halfOpen = true, int64_t min = 1) {
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assert(arrayAttr1.size() <= static_cast<unsigned>(shape.getRank()));
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assert(arrayAttr2.size() <= static_cast<unsigned>(shape.getRank()));
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for (auto it : llvm::zip(arrayAttr1, arrayAttr2, shape.getShape())) {
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auto val1 = std::get<0>(it).cast<IntegerAttr>().getInt();
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auto val2 = std::get<1>(it).cast<IntegerAttr>().getInt();
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auto max = std::get<2>(it);
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if (!halfOpen)
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max += 1;
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if (val1 + val2 < 0 || val1 + val2 >= max) {
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op.emitOpError("expected sum(")
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<< attrName1 << ", " << attrName2 << ") to be confined to [" << min
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<< ", " << max << ")";
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return false;
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}
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}
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return true;
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}
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static LogicalResult verify(VectorStridedSliceOp op) {
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auto type = op.getVectorType();
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auto offsets = op.offsets();
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auto sizes = op.sizes();
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auto strides = op.strides();
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if (offsets.size() != sizes.size() || offsets.size() != strides.size()) {
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op.emitOpError(
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"expected offsets, sizes and strides attributes of same size");
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return failure();
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}
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auto offName = VectorStridedSliceOp::getOffsetsAttrName();
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auto sizesName = VectorStridedSliceOp::getSizesAttrName();
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auto stridesName = VectorStridedSliceOp::getStridesAttrName();
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if (!isIntegerArrayAttrSmallerThanShape(op, offsets, type, offName) ||
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!isIntegerArrayAttrSmallerThanShape(op, sizes, type, sizesName) ||
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!isIntegerArrayAttrSmallerThanShape(op, strides, type, stridesName) ||
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!isIntegerArrayAttrConfinedToShape(op, offsets, type, offName) ||
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!isIntegerArrayAttrConfinedToShape(op, sizes, type, sizesName,
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/*halfOpen=*/false, /*min=*/1) ||
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!isIntegerArrayAttrConfinedToRange(op, strides, 1, 1, stridesName,
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/*halfOpen=*/false) ||
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!isSumOfIntegerArrayAttrConfinedToShape(op, offsets, sizes, type, offName,
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sizesName, /*halfOpen=*/false))
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return failure();
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auto resultType = inferVectorExtractRangeOpResultType(
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op.getVectorType(), op.offsets(), op.sizes(), op.strides());
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if (op.getResult()->getType() != resultType) {
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op.emitOpError("expected result type to be ") << resultType;
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return failure();
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}
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return success();
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}
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//===----------------------------------------------------------------------===//
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// VectorOuterProductOp
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//===----------------------------------------------------------------------===//
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static void print(OpAsmPrinter &p, VectorOuterProductOp op) {
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p << op.getOperationName() << " " << *op.lhs() << ", " << *op.rhs();
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if (llvm::size(op.acc()) > 0)
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p << ", " << **op.acc().begin();
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p << " : " << op.lhs()->getType() << ", " << op.rhs()->getType();
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}
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static ParseResult parseVectorOuterProductOp(OpAsmParser &parser,
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OperationState &result) {
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SmallVector<OpAsmParser::OperandType, 3> operandsInfo;
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Type tLHS, tRHS;
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if (parser.parseOperandList(operandsInfo) || parser.parseColonType(tLHS) ||
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parser.parseComma() || parser.parseType(tRHS))
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return failure();
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if (operandsInfo.size() < 2)
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return parser.emitError(parser.getNameLoc(),
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"expected at least 2 operands");
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VectorType vLHS = tLHS.dyn_cast<VectorType>();
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VectorType vRHS = tRHS.dyn_cast<VectorType>();
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if (!vLHS || !vRHS)
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return parser.emitError(parser.getNameLoc(), "expected 2 vector types");
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VectorType resType = VectorType::get({vLHS.getDimSize(0), vRHS.getDimSize(0)},
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vLHS.getElementType());
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return failure(
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parser.resolveOperand(operandsInfo[0], tLHS, result.operands) ||
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parser.resolveOperand(operandsInfo[1], tRHS, result.operands) ||
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(operandsInfo.size() > 2 &&
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parser.resolveOperand(operandsInfo[2], resType, result.operands)) ||
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parser.addTypeToList(resType, result.types));
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}
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static LogicalResult verify(VectorOuterProductOp op) {
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VectorType vLHS = op.getOperandVectorTypeLHS(),
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vRHS = op.getOperandVectorTypeRHS(),
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vACC = op.getOperandVectorTypeACC(), vRES = op.getVectorType();
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if (vLHS.getRank() != 1)
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return op.emitOpError("expected 1-d vector for operand #1");
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if (vRHS.getRank() != 1)
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return op.emitOpError("expected 1-d vector for operand #2");
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if (vRES.getRank() != 2)
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return op.emitOpError("expected 2-d vector result");
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if (vLHS.getDimSize(0) != vRES.getDimSize(0))
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return op.emitOpError("expected #1 operand dim to match result dim #1");
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if (vRHS.getDimSize(0) != vRES.getDimSize(1))
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return op.emitOpError("expected #2 operand dim to match result dim #2");
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if (vACC && vACC != vRES)
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return op.emitOpError("expected operand #3 of same type as result type");
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return success();
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}
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//===----------------------------------------------------------------------===//
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// VectorTransferReadOp
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//===----------------------------------------------------------------------===//
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template <typename EmitFun>
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static LogicalResult verifyPermutationMap(AffineMap permutationMap,
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EmitFun emitOpError) {
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SmallVector<bool, 8> seen(permutationMap.getNumInputs(), false);
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for (auto expr : permutationMap.getResults()) {
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auto dim = expr.dyn_cast<AffineDimExpr>();
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auto zero = expr.dyn_cast<AffineConstantExpr>();
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if (zero) {
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if (zero.getValue() != 0) {
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return emitOpError(
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"requires a projected permutation_map (at most one dim or the zero "
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"constant can appear in each result)");
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}
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continue;
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}
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if (!dim) {
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return emitOpError("requires a projected permutation_map (at most one "
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"dim or the zero constant can appear in each result)");
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}
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if (seen[dim.getPosition()]) {
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return emitOpError(
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"requires a permutation_map that is a permutation (found one dim "
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"used more than once)");
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}
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seen[dim.getPosition()] = true;
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}
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return success();
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}
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static void print(OpAsmPrinter &p, VectorTransferReadOp op) {
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p << op.getOperationName() << " ";
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p.printOperand(op.memref());
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p << "[";
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p.printOperands(op.indices());
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p << "], ";
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p.printOperand(op.padding());
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p << " ";
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p.printOptionalAttrDict(op.getAttrs());
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p << " : " << op.getMemRefType();
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p << ", " << op.getVectorType();
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}
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ParseResult parseVectorTransferReadOp(OpAsmParser &parser,
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OperationState &result) {
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llvm::SMLoc typesLoc;
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OpAsmParser::OperandType memrefInfo;
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SmallVector<OpAsmParser::OperandType, 8> indexInfo;
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OpAsmParser::OperandType paddingInfo;
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SmallVector<Type, 2> types;
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// Parsing with support for optional paddingValue.
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if (parser.parseOperand(memrefInfo) ||
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parser.parseOperandList(indexInfo, OpAsmParser::Delimiter::Square) ||
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parser.parseComma() || parser.parseOperand(paddingInfo) ||
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parser.parseOptionalAttrDict(result.attributes) ||
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parser.getCurrentLocation(&typesLoc) || parser.parseColonTypeList(types))
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return failure();
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if (types.size() != 2)
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return parser.emitError(typesLoc, "two types required");
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auto indexType = parser.getBuilder().getIndexType();
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MemRefType memRefType = types[0].dyn_cast<MemRefType>();
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if (!memRefType)
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return parser.emitError(typesLoc, "memref type required"), failure();
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Type vectorType = types[1];
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return failure(
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parser.resolveOperand(memrefInfo, memRefType, result.operands) ||
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parser.resolveOperands(indexInfo, indexType, result.operands) ||
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parser.resolveOperand(paddingInfo, memRefType.getElementType(),
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result.operands) ||
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parser.addTypeToList(vectorType, result.types));
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}
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static LogicalResult verify(VectorTransferReadOp op) {
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// Consistency of elemental types in memref and vector.
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MemRefType memrefType = op.getMemRefType();
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VectorType vectorType = op.getVectorType();
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if (memrefType.getElementType() != vectorType.getElementType())
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return op.emitOpError(
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"requires memref and vector types of the same elemental type");
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auto elementalType = op.padding()->getType();
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if (!VectorType::isValidElementType(elementalType))
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return op.emitOpError("requires valid padding vector elemental type");
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if (elementalType != vectorType.getElementType())
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return op.emitOpError(
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"requires formal padding and vector of the same elemental type");
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if (llvm::size(op.indices()) != memrefType.getRank())
|
|
return op.emitOpError("requires ") << memrefType.getRank() << " indices";
|
|
auto permutationMap = op.permutation_map();
|
|
if (permutationMap.getNumSymbols() != 0)
|
|
return op.emitOpError("requires permutation_map without symbols");
|
|
if (permutationMap.getNumInputs() != memrefType.getRank())
|
|
return op.emitOpError("requires a permutation_map with input dims of the "
|
|
"same rank as the memref type");
|
|
if (permutationMap.getNumResults() != vectorType.getRank())
|
|
return op.emitOpError("requires a permutation_map with result dims of the "
|
|
"same rank as the vector type");
|
|
return verifyPermutationMap(permutationMap,
|
|
[&op](Twine t) { return op.emitOpError(t); });
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// VectorTransferWriteOp
|
|
//===----------------------------------------------------------------------===//
|
|
static void print(OpAsmPrinter &p, VectorTransferWriteOp op) {
|
|
p << op.getOperationName() << " " << *op.vector() << ", " << *op.memref();
|
|
p << "[";
|
|
p.printOperands(op.indices());
|
|
p << "]";
|
|
p.printOptionalAttrDict(op.getAttrs());
|
|
p << " : ";
|
|
p.printType(op.getVectorType());
|
|
p << ", ";
|
|
p.printType(op.getMemRefType());
|
|
}
|
|
|
|
ParseResult parseVectorTransferWriteOp(OpAsmParser &parser,
|
|
OperationState &result) {
|
|
llvm::SMLoc typesLoc;
|
|
OpAsmParser::OperandType storeValueInfo;
|
|
OpAsmParser::OperandType memRefInfo;
|
|
SmallVector<OpAsmParser::OperandType, 4> indexInfo;
|
|
SmallVector<Type, 2> types;
|
|
if (parser.parseOperand(storeValueInfo) || parser.parseComma() ||
|
|
parser.parseOperand(memRefInfo) ||
|
|
parser.parseOperandList(indexInfo, OpAsmParser::Delimiter::Square) ||
|
|
parser.parseOptionalAttrDict(result.attributes) ||
|
|
parser.getCurrentLocation(&typesLoc) || parser.parseColonTypeList(types))
|
|
return failure();
|
|
if (types.size() != 2)
|
|
return parser.emitError(typesLoc, "two types required");
|
|
auto indexType = parser.getBuilder().getIndexType();
|
|
Type vectorType = types[0], memRefType = types[1];
|
|
return failure(
|
|
parser.resolveOperand(storeValueInfo, vectorType, result.operands) ||
|
|
parser.resolveOperand(memRefInfo, memRefType, result.operands) ||
|
|
parser.resolveOperands(indexInfo, indexType, result.operands));
|
|
}
|
|
|
|
static LogicalResult verify(VectorTransferWriteOp op) {
|
|
// Consistency of elemental types in memref and vector.
|
|
MemRefType memrefType = op.getMemRefType();
|
|
VectorType vectorType = op.getVectorType();
|
|
if (memrefType.getElementType() != vectorType.getElementType())
|
|
return op.emitOpError(
|
|
"requires memref and vector types of the same elemental type");
|
|
if (llvm::size(op.indices()) != memrefType.getRank())
|
|
return op.emitOpError("requires ") << memrefType.getRank() << " indices";
|
|
|
|
// Consistency of AffineMap attribute.
|
|
auto permutationMap = op.permutation_map();
|
|
if (permutationMap.getNumSymbols() != 0)
|
|
return op.emitOpError("requires a symbol-less permutation_map");
|
|
if (permutationMap.getNumInputs() != memrefType.getRank())
|
|
return op.emitOpError("requires a permutation_map with input dims of the "
|
|
"same rank as the memref type: ")
|
|
<< permutationMap.getNumInputs() << " vs " << memrefType;
|
|
if (permutationMap.getNumResults() != vectorType.getRank())
|
|
return op.emitOpError("requires a permutation_map with result dims of the "
|
|
"same rank as the vector type.")
|
|
<< permutationMap.getNumResults() << " vs " << vectorType;
|
|
return verifyPermutationMap(permutationMap,
|
|
[&op](Twine t) { return op.emitOpError(t); });
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// VectorTypeCastOp
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
static MemRefType inferVectorTypeCastResultType(MemRefType t) {
|
|
return MemRefType::get({}, VectorType::get(t.getShape(), t.getElementType()));
|
|
}
|
|
|
|
void VectorTypeCastOp::build(Builder *builder, OperationState &result,
|
|
Value *source) {
|
|
result.addOperands(source);
|
|
result.addTypes(
|
|
inferVectorTypeCastResultType(source->getType().cast<MemRefType>()));
|
|
}
|
|
|
|
static void print(OpAsmPrinter &p, VectorTypeCastOp &op) {
|
|
auto type = op.getOperand()->getType().cast<MemRefType>();
|
|
p << op.getOperationName() << ' ' << *op.memref() << " : " << type << " to "
|
|
<< inferVectorTypeCastResultType(type);
|
|
}
|
|
|
|
static LogicalResult verify(VectorTypeCastOp &op) {
|
|
auto resultType = inferVectorTypeCastResultType(op.getMemRefType());
|
|
if (op.getResultMemRefType() != resultType)
|
|
return op.emitOpError("expects result type to be: ") << resultType;
|
|
return success();
|
|
}
|
|
|
|
namespace mlir {
|
|
|
|
#define GET_OP_CLASSES
|
|
#include "mlir/Dialect/VectorOps/VectorOps.cpp.inc"
|
|
|
|
} // namespace mlir
|