intel/llvm

mirror of https://github.com/intel/llvm.git synced 2026-01-30 22:53:05 +08:00

Files

Aart Bik ff94061a9f [mlir][sparse] remove reshape dot test (#70359 )

This no longer tests a required feature.

2023-10-26 11:14:44 -07:00

benchmark/python

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cmake/modules

[MLIR] Add SyclRuntimeWrapper (#69648 )

2023-10-26 19:41:09 +02:00

docs

[mlir][emitc] Add a structured for operation (#68206 )

2023-10-26 16:40:18 +03:00

examples

Apply clang-tidy fixes for misc-include-cleaner in MLIR examples

2023-10-25 22:27:30 -07:00

include

[mlir][emitc] Add a structured for operation (#68206 )

2023-10-26 16:40:18 +03:00

lib

[mlir] Remove no-op ptr-to-ptr bitcasts (NFC)

2023-10-26 13:01:23 -05:00

python

Add missing linalg.batch_vecmat named op (#70218 )

2023-10-25 11:41:24 -04:00

test

[mlir][sparse] remove reshape dot test (#70359 )

2023-10-26 11:14:44 -07:00

tools

[mlir][ods] Emit bytecode readers with generic Attribute/Type (NFC)

2023-10-24 08:06:51 +00:00

unittests

[mlir][sparse] cleanup merger test, add header (#70279 )

2023-10-26 09:06:57 -07:00

utils

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.clang-format

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.clang-tidy

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CMakeLists.txt

[MLIR] Add SyclRuntimeWrapper (#69648 )

2023-10-26 19:41:09 +02:00

LICENSE.TXT

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README.md

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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.