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riscv: Modify generic codes to support RISC-V

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Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Rick Chen
2017-12-26 13:55:58 +08:00
committed by Tom Rini
parent c7d7e80acd
commit 068feb9b86
6 changed files with 29 additions and 3 deletions
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4
common/board_r.c
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@ -126,7 +126,7 @@ static int initr_reloc_global_data(void)
{
#ifdef __ARM__
monitor_flash_len = _end - __image_copy_start;
#elif defined(CONFIG_NDS32)
#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
monitor_flash_len = (ulong)&_end - (ulong)&_start;
#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
@ -704,7 +704,7 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_DM
initr_dm,
#endif
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
board_init, /* Setup chipselects */
#endif
/*